xref: /llvm-project/llvm/test/CodeGen/AArch64/f16-imm.ll (revision d39b4ce3ce8a3c256e01bdec2b140777a332a633)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+no-zcz-fp | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-NOZCZ
3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+zcz | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-ZCZ
4; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK-NOFP16
5
6define half @Const0() {
7; CHECK-NOZCZ-LABEL: Const0:
8; CHECK-NOZCZ:       // %bb.0: // %entry
9; CHECK-NOZCZ-NEXT:    fmov h0, wzr
10; CHECK-NOZCZ-NEXT:    ret
11;
12; CHECK-ZCZ-LABEL: Const0:
13; CHECK-ZCZ:       // %bb.0: // %entry
14; CHECK-ZCZ-NEXT:    movi d0, #0000000000000000
15; CHECK-ZCZ-NEXT:    ret
16;
17; CHECK-NOFP16-LABEL: Const0:
18; CHECK-NOFP16:       // %bb.0: // %entry
19; CHECK-NOFP16-NEXT:    movi d0, #0000000000000000
20; CHECK-NOFP16-NEXT:    ret
21entry:
22  ret half 0xH0000
23}
24
25define half @Const1() {
26; CHECK-FP16-LABEL: Const1:
27; CHECK-FP16:       // %bb.0: // %entry
28; CHECK-FP16-NEXT:    fmov h0, #1.00000000
29; CHECK-FP16-NEXT:    ret
30;
31; CHECK-NOFP16-LABEL: Const1:
32; CHECK-NOFP16:       // %bb.0: // %entry
33; CHECK-NOFP16-NEXT:    adrp x8, .LCPI1_0
34; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI1_0]
35; CHECK-NOFP16-NEXT:    ret
36entry:
37  ret half 0xH3C00
38}
39
40define half @Const2() {
41; CHECK-FP16-LABEL: Const2:
42; CHECK-FP16:       // %bb.0: // %entry
43; CHECK-FP16-NEXT:    fmov h0, #0.12500000
44; CHECK-FP16-NEXT:    ret
45;
46; CHECK-NOFP16-LABEL: Const2:
47; CHECK-NOFP16:       // %bb.0: // %entry
48; CHECK-NOFP16-NEXT:    adrp x8, .LCPI2_0
49; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI2_0]
50; CHECK-NOFP16-NEXT:    ret
51entry:
52  ret half 0xH3000
53}
54
55define half @Const3() {
56; CHECK-FP16-LABEL: Const3:
57; CHECK-FP16:       // %bb.0: // %entry
58; CHECK-FP16-NEXT:    fmov h0, #30.00000000
59; CHECK-FP16-NEXT:    ret
60;
61; CHECK-NOFP16-LABEL: Const3:
62; CHECK-NOFP16:       // %bb.0: // %entry
63; CHECK-NOFP16-NEXT:    adrp x8, .LCPI3_0
64; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI3_0]
65; CHECK-NOFP16-NEXT:    ret
66entry:
67  ret half 0xH4F80
68}
69
70define half @Const4() {
71; CHECK-FP16-LABEL: Const4:
72; CHECK-FP16:       // %bb.0: // %entry
73; CHECK-FP16-NEXT:    fmov h0, #31.00000000
74; CHECK-FP16-NEXT:    ret
75;
76; CHECK-NOFP16-LABEL: Const4:
77; CHECK-NOFP16:       // %bb.0: // %entry
78; CHECK-NOFP16-NEXT:    adrp x8, .LCPI4_0
79; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI4_0]
80; CHECK-NOFP16-NEXT:    ret
81entry:
82  ret half 0xH4FC0
83}
84
85define half @Const5() {
86; CHECK-FP16-LABEL: Const5:
87; CHECK-FP16:       // %bb.0: // %entry
88; CHECK-FP16-NEXT:    mov w8, #12272
89; CHECK-FP16-NEXT:    fmov h0, w8
90; CHECK-FP16-NEXT:    ret
91;
92; CHECK-NOFP16-LABEL: Const5:
93; CHECK-NOFP16:       // %bb.0: // %entry
94; CHECK-NOFP16-NEXT:    adrp x8, .LCPI5_0
95; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI5_0]
96; CHECK-NOFP16-NEXT:    ret
97entry:
98  ret half 0xH2FF0
99}
100
101define half @Const6() {
102; CHECK-FP16-LABEL: Const6:
103; CHECK-FP16:       // %bb.0: // %entry
104; CHECK-FP16-NEXT:    mov w8, #20417
105; CHECK-FP16-NEXT:    fmov h0, w8
106; CHECK-FP16-NEXT:    ret
107;
108; CHECK-NOFP16-LABEL: Const6:
109; CHECK-NOFP16:       // %bb.0: // %entry
110; CHECK-NOFP16-NEXT:    adrp x8, .LCPI6_0
111; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI6_0]
112; CHECK-NOFP16-NEXT:    ret
113entry:
114  ret half 0xH4FC1
115}
116
117define half @Const7() {
118; CHECK-FP16-LABEL: Const7:
119; CHECK-FP16:       // %bb.0: // %entry
120; CHECK-FP16-NEXT:    mov w8, #20480
121; CHECK-FP16-NEXT:    fmov h0, w8
122; CHECK-FP16-NEXT:    ret
123;
124; CHECK-NOFP16-LABEL: Const7:
125; CHECK-NOFP16:       // %bb.0: // %entry
126; CHECK-NOFP16-NEXT:    adrp x8, .LCPI7_0
127; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI7_0]
128; CHECK-NOFP16-NEXT:    ret
129entry:
130  ret half 0xH5000
131}
132
133