xref: /llvm-project/llvm/test/CodeGen/AArch64/dag-combine-select.ll (revision db158c7c830807caeeb0691739c41f1d522029e9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple arm64-none-eabi -o - %s | FileCheck %s --check-prefixes=CHECK,SDISEL
3; RUN: llc -mtriple arm64-none-eabi -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK,GISEL
4
5@out = internal global i32 0, align 4
6
7; Ensure that we transform select(C0, x, select(C1, x, y)) towards
8; select(C0 | C1, x, y) so we can use CMP;CCMP for the implementation.
9define i32 @test0(i32 %v0, i32 %v1, i32 %v2) {
10; SDISEL-LABEL: test0:
11; SDISEL:       // %bb.0:
12; SDISEL-NEXT:    cmp w0, #7
13; SDISEL-NEXT:    ccmp w1, #0, #0, ne
14; SDISEL-NEXT:    csel w0, w1, w2, gt
15; SDISEL-NEXT:    ret
16;
17; GISEL-LABEL: test0:
18; GISEL:       // %bb.0:
19; GISEL-NEXT:    cmp w0, #7
20; GISEL-NEXT:    csel w8, w1, w2, eq
21; GISEL-NEXT:    cmp w1, #0
22; GISEL-NEXT:    csel w0, w1, w8, gt
23; GISEL-NEXT:    ret
24  %cmp1 = icmp eq i32 %v0, 7
25  %cmp2 = icmp sgt i32 %v1, 0
26  %sel0 = select i1 %cmp1, i32 %v1, i32 %v2
27  %sel1 = select i1 %cmp2, i32 %v1, i32 %sel0
28  ret i32 %sel1
29}
30
31; Usually we keep select(C0 | C1, x, y) as is on aarch64 to create CMP;CCMP
32; sequences. This case should be transformed to select(C0, select(C1, x, y), y)
33; anyway to get CSE effects.
34define void @test1(i32 %bitset, i32 %val0, i32 %val1) {
35; SDISEL-LABEL: test1:
36; SDISEL:       // %bb.0:
37; SDISEL-NEXT:    cmp w0, #7
38; SDISEL-NEXT:    adrp x9, out
39; SDISEL-NEXT:    csel w8, w1, w2, eq
40; SDISEL-NEXT:    cmp w8, #13
41; SDISEL-NEXT:    csel w8, w1, w2, lo
42; SDISEL-NEXT:    cmp w0, #42
43; SDISEL-NEXT:    csel w10, w1, w8, eq
44; SDISEL-NEXT:    str w8, [x9, :lo12:out]
45; SDISEL-NEXT:    str w10, [x9, :lo12:out]
46; SDISEL-NEXT:    ret
47;
48; GISEL-LABEL: test1:
49; GISEL:       // %bb.0:
50; GISEL-NEXT:    cmp w0, #7
51; GISEL-NEXT:    csel w8, w1, w2, eq
52; GISEL-NEXT:    cmp w8, #13
53; GISEL-NEXT:    cset w8, lo
54; GISEL-NEXT:    tst w8, #0x1
55; GISEL-NEXT:    csel w9, w1, w2, ne
56; GISEL-NEXT:    cmp w0, #42
57; GISEL-NEXT:    cset w10, eq
58; GISEL-NEXT:    orr w8, w10, w8
59; GISEL-NEXT:    tst w8, #0x1
60; GISEL-NEXT:    adrp x8, out
61; GISEL-NEXT:    csel w10, w1, w2, ne
62; GISEL-NEXT:    str w9, [x8, :lo12:out]
63; GISEL-NEXT:    str w10, [x8, :lo12:out]
64; GISEL-NEXT:    ret
65  %cmp1 = icmp eq i32 %bitset, 7
66  %cond = select i1 %cmp1, i32 %val0, i32 %val1
67  %cmp5 = icmp ult i32 %cond, 13
68  %cond11 = select i1 %cmp5, i32 %val0, i32 %val1
69  %cmp3 = icmp eq i32 %bitset, 42
70  %or.cond = or i1 %cmp3, %cmp5
71  %cond17 = select i1 %or.cond, i32 %val0, i32 %val1
72  store volatile i32 %cond11, ptr @out, align 4
73  store volatile i32 %cond17, ptr @out, align 4
74  ret void
75}
76;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
77; CHECK: {{.*}}
78