xref: /llvm-project/llvm/test/CodeGen/AArch64/dag-combine-invaraints.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; RUN: llc -mtriple=arm64-apple-darwin8.0 -relocation-model=pic -O1 < %s | FileCheck %s
2
3@.str2 = private unnamed_addr constant [9 x i8] c"_%d____\0A\00", align 1
4
5; Function Attrs: nounwind ssp
6define i32 @main(i32 %argc, ptr %argv) #0 {
7main_:
8  %tmp = alloca i32, align 4
9  %i32T = alloca i32, align 4
10  %i32F = alloca i32, align 4
11  %i32X = alloca i32, align 4
12  store i32 %argc, ptr %tmp
13  store i32 15, ptr %i32T, align 4
14  store i32 5, ptr %i32F, align 4
15  %tmp6 = load i32, ptr %tmp, align 4
16  %tmp7 = icmp ne i32 %tmp6, 0
17  %tmp8 = xor i1 %tmp7, true
18  %tmp9 = load i32, ptr %i32T, align 4
19  %tmp10 = load i32, ptr %i32F, align 4
20  %DHSelect = select i1 %tmp8, i32 %tmp9, i32 %tmp10
21  store i32 %DHSelect, ptr %i32X, align 4
22  %tmp15 = load i32, ptr %i32X, align 4
23  %tmp17 = call i32 (ptr, ...) @printf(ptr @.str2, i32 %tmp15)
24  ret i32 0
25
26; CHECK: main:
27; CHECK-DAG: mov {{.*}}, #15
28; CHECK-DAG: mov {{.*}}, #5
29; CHECK: csel
30}
31
32
33declare i32 @printf(ptr, ...) #1
34
35attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
36attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
37