xref: /llvm-project/llvm/test/CodeGen/AArch64/convert-highly-predictable-select-to-branch.ll (revision ce08c7ee1e86ec6d4c02e19db6724d16a578a48b)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=generic -S < %s | FileCheck %s --check-prefix=CHECK-GENERIC
3; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=neoverse-n1 -S < %s | FileCheck %s
4; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -S < %s | FileCheck %s
5; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=cortex-a72 -S < %s | FileCheck %s
6; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=aarch64-linux-gnu -mcpu=generic -S < %s | FileCheck %s --check-prefix=CHECK-GENERIC
7; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=aarch64-linux-gnu -mcpu=neoverse-n1 -S < %s | FileCheck %s
8; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -S < %s | FileCheck %s
9; RUN: opt -passes='require<profile-summary>,function(select-optimize)' -mtriple=aarch64-linux-gnu -mcpu=cortex-a72 -S < %s | FileCheck %s
10
11; Test has not predictable select, which should not be transformed to a branch
12define i32 @test1(i32 %a) {
13; CHECK-GENERIC-LABEL: @test1(
14; CHECK-GENERIC-NEXT:  entry:
15; CHECK-GENERIC-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 1
16; CHECK-GENERIC-NEXT:    [[DEC:%.*]] = sub i32 [[A]], 1
17; CHECK-GENERIC-NEXT:    [[RES:%.*]] = select i1 [[CMP]], i32 0, i32 [[DEC]], !prof [[PROF0:![0-9]+]]
18; CHECK-GENERIC-NEXT:    ret i32 [[RES]]
19;
20; CHECK-LABEL: @test1(
21; CHECK-NEXT:  entry:
22; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 1
23; CHECK-NEXT:    [[DEC:%.*]] = sub i32 [[A]], 1
24; CHECK-NEXT:    [[RES:%.*]] = select i1 [[CMP]], i32 0, i32 [[DEC]], !prof [[PROF0:![0-9]+]]
25; CHECK-NEXT:    ret i32 [[RES]]
26;
27entry:
28  %cmp = icmp slt i32 %a, 1
29  %dec = sub i32 %a, 1
30  %res = select i1 %cmp, i32 0, i32 %dec, !prof !0
31  ret i32 %res
32}
33
34; Test has highly predictable select according to profile data,
35; which should be transformed to a branch on cores with enabled FeaturePredictableSelectIsExpensive
36define i32 @test2(i32 %a) {
37; CHECK-GENERIC-LABEL: @test2(
38; CHECK-GENERIC-NEXT:  entry:
39; CHECK-GENERIC-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 1
40; CHECK-GENERIC-NEXT:    [[DEC:%.*]] = sub i32 [[A]], 1
41; CHECK-GENERIC-NEXT:    [[RES:%.*]] = select i1 [[CMP]], i32 0, i32 [[DEC]], !prof [[PROF1:![0-9]+]]
42; CHECK-GENERIC-NEXT:    ret i32 [[RES]]
43;
44; CHECK-LABEL: @test2(
45; CHECK-NEXT:  entry:
46; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A:%.*]], 1
47; CHECK-NEXT:    [[RES_FROZEN:%.*]] = freeze i1 [[CMP]]
48; CHECK-NEXT:    br i1 [[RES_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE_SINK:%.*]], !prof [[PROF1:![0-9]+]]
49; CHECK:       select.false.sink:
50; CHECK-NEXT:    [[DEC:%.*]] = sub i32 [[A]], 1
51; CHECK-NEXT:    br label [[SELECT_END]]
52; CHECK:       select.end:
53; CHECK-NEXT:    [[RES:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[DEC]], [[SELECT_FALSE_SINK]] ]
54; CHECK-NEXT:    ret i32 [[RES]]
55;
56entry:
57  %cmp = icmp slt i32 %a, 1
58  %dec = sub i32 %a, 1
59  %res = select i1 %cmp, i32 0, i32 %dec, !prof !1
60  ret i32 %res
61}
62
63!0 = !{!"branch_weights", i32 1, i32 1}
64!1 = !{!"branch_weights", i32 1, i32 1000}
65