xref: /llvm-project/llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-mul-scalable.ll (revision bfc0317153dca75137fba00b5c28758d6f720963) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s --mattr=+sve2 -o - | FileCheck %s
3
4target triple = "aarch64"
5
6; Expected to transform
7define <vscale x 2 x i64> @complex_mul_v2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
8; CHECK-LABEL: complex_mul_v2i64:
9; CHECK:       // %bb.0: // %entry
10; CHECK-NEXT:    mov z2.d, #0 // =0x0
11; CHECK-NEXT:    cmla z2.d, z1.d, z0.d, #0
12; CHECK-NEXT:    cmla z2.d, z1.d, z0.d, #90
13; CHECK-NEXT:    mov z0.d, z2.d
14; CHECK-NEXT:    ret
15entry:
16  %a.deinterleaved = tail call { <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave2.nxv2i64(<vscale x 2 x i64> %a)
17  %a.real = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } %a.deinterleaved, 0
18  %a.imag = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } %a.deinterleaved, 1
19  %b.deinterleaved = tail call { <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave2.nxv2i64(<vscale x 2 x i64> %b)
20  %b.real = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } %b.deinterleaved, 0
21  %b.imag = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i64> } %b.deinterleaved, 1
22  %0 = mul <vscale x 1 x i64> %b.imag, %a.real
23  %1 = mul <vscale x 1 x i64> %b.real, %a.imag
24  %2 = add <vscale x 1 x i64> %1, %0
25  %3 = mul <vscale x 1 x i64> %b.real, %a.real
26  %4 = mul <vscale x 1 x i64> %a.imag, %b.imag
27  %5 = sub <vscale x 1 x i64> %3, %4
28  %interleaved.vec = tail call <vscale x 2 x i64> @llvm.vector.interleave2.nxv2i64(<vscale x 1 x i64> %5, <vscale x 1 x i64> %2)
29  ret <vscale x 2 x i64> %interleaved.vec
30}
31
32; Expected to transform
33define <vscale x 4 x i64> @complex_mul_v4i64(<vscale x 4 x i64> %a, <vscale x 4 x i64> %b) {
34; CHECK-LABEL: complex_mul_v4i64:
35; CHECK:       // %bb.0: // %entry
36; CHECK-NEXT:    mov z4.d, #0 // =0x0
37; CHECK-NEXT:    mov z5.d, z4.d
38; CHECK-NEXT:    cmla z4.d, z3.d, z1.d, #0
39; CHECK-NEXT:    cmla z5.d, z2.d, z0.d, #0
40; CHECK-NEXT:    cmla z4.d, z3.d, z1.d, #90
41; CHECK-NEXT:    cmla z5.d, z2.d, z0.d, #90
42; CHECK-NEXT:    mov z1.d, z4.d
43; CHECK-NEXT:    mov z0.d, z5.d
44; CHECK-NEXT:    ret
45entry:
46  %a.deinterleaved = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> %a)
47  %a.real = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } %a.deinterleaved, 0
48  %a.imag = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } %a.deinterleaved, 1
49  %b.deinterleaved = tail call { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64> %b)
50  %b.real = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } %b.deinterleaved, 0
51  %b.imag = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i64> } %b.deinterleaved, 1
52  %0 = mul <vscale x 2 x i64> %b.imag, %a.real
53  %1 = mul <vscale x 2 x i64> %b.real, %a.imag
54  %2 = add <vscale x 2 x i64> %1, %0
55  %3 = mul <vscale x 2 x i64> %b.real, %a.real
56  %4 = mul <vscale x 2 x i64> %a.imag, %b.imag
57  %5 = sub <vscale x 2 x i64> %3, %4
58  %interleaved.vec = tail call <vscale x 4 x i64> @llvm.vector.interleave2.nxv4i64(<vscale x 2 x i64> %5, <vscale x 2 x i64> %2)
59  ret <vscale x 4 x i64> %interleaved.vec
60}
61
62; Expected to transform
63define <vscale x 8 x i64> @complex_mul_v8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b) {
64; CHECK-LABEL: complex_mul_v8i64:
65; CHECK:       // %bb.0: // %entry
66; CHECK-NEXT:    mov z24.d, #0 // =0x0
67; CHECK-NEXT:    mov z25.d, z24.d
68; CHECK-NEXT:    mov z26.d, z24.d
69; CHECK-NEXT:    mov z27.d, z24.d
70; CHECK-NEXT:    cmla z24.d, z7.d, z3.d, #0
71; CHECK-NEXT:    cmla z25.d, z4.d, z0.d, #0
72; CHECK-NEXT:    cmla z26.d, z5.d, z1.d, #0
73; CHECK-NEXT:    cmla z27.d, z6.d, z2.d, #0
74; CHECK-NEXT:    cmla z24.d, z7.d, z3.d, #90
75; CHECK-NEXT:    cmla z25.d, z4.d, z0.d, #90
76; CHECK-NEXT:    cmla z26.d, z5.d, z1.d, #90
77; CHECK-NEXT:    cmla z27.d, z6.d, z2.d, #90
78; CHECK-NEXT:    mov z3.d, z24.d
79; CHECK-NEXT:    mov z0.d, z25.d
80; CHECK-NEXT:    mov z1.d, z26.d
81; CHECK-NEXT:    mov z2.d, z27.d
82; CHECK-NEXT:    ret
83entry:
84  %a.deinterleaved = tail call { <vscale x 4 x i64>, <vscale x 4 x i64> } @llvm.vector.deinterleave2.nxv8i64(<vscale x 8 x i64> %a)
85  %a.real = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %a.deinterleaved, 0
86  %a.imag = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %a.deinterleaved, 1
87  %b.deinterleaved = tail call { <vscale x 4 x i64>, <vscale x 4 x i64> } @llvm.vector.deinterleave2.nxv8i64(<vscale x 8 x i64> %b)
88  %b.real = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %b.deinterleaved, 0
89  %b.imag = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %b.deinterleaved, 1
90  %0 = mul <vscale x 4 x i64> %b.imag, %a.real
91  %1 = mul <vscale x 4 x i64> %b.real, %a.imag
92  %2 = add <vscale x 4 x i64> %1, %0
93  %3 = mul <vscale x 4 x i64> %b.real, %a.real
94  %4 = mul <vscale x 4 x i64> %a.imag, %b.imag
95  %5 = sub <vscale x 4 x i64> %3, %4
96  %interleaved.vec = tail call <vscale x 8 x i64> @llvm.vector.interleave2.nxv8i64(<vscale x 4 x i64> %5, <vscale x 4 x i64> %2)
97  ret <vscale x 8 x i64> %interleaved.vec
98}
99
100; Expected to transform
101define <vscale x 8 x i64> @complex_minus_mul_v8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b) {
102; CHECK-LABEL: complex_minus_mul_v8i64:
103; CHECK:       // %bb.0: // %entry
104; CHECK-NEXT:    mov z24.d, #0 // =0x0
105; CHECK-NEXT:    mov z25.d, z24.d
106; CHECK-NEXT:    mov z26.d, z24.d
107; CHECK-NEXT:    mov z27.d, z24.d
108; CHECK-NEXT:    cmla z24.d, z7.d, z3.d, #270
109; CHECK-NEXT:    cmla z25.d, z4.d, z0.d, #270
110; CHECK-NEXT:    cmla z26.d, z5.d, z1.d, #270
111; CHECK-NEXT:    cmla z27.d, z6.d, z2.d, #270
112; CHECK-NEXT:    cmla z24.d, z7.d, z3.d, #180
113; CHECK-NEXT:    cmla z25.d, z4.d, z0.d, #180
114; CHECK-NEXT:    cmla z26.d, z5.d, z1.d, #180
115; CHECK-NEXT:    cmla z27.d, z6.d, z2.d, #180
116; CHECK-NEXT:    mov z3.d, z24.d
117; CHECK-NEXT:    mov z0.d, z25.d
118; CHECK-NEXT:    mov z1.d, z26.d
119; CHECK-NEXT:    mov z2.d, z27.d
120; CHECK-NEXT:    ret
121entry:
122  %a.deinterleaved = tail call { <vscale x 4 x i64>, <vscale x 4 x i64> } @llvm.vector.deinterleave2.nxv8i64(<vscale x 8 x i64> %a)
123  %a.real = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %a.deinterleaved, 0
124  %a.imag = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %a.deinterleaved, 1
125  %0 = sub <vscale x 4 x i64> zeroinitializer, %a.real
126  %b.deinterleaved = tail call { <vscale x 4 x i64>, <vscale x 4 x i64> } @llvm.vector.deinterleave2.nxv8i64(<vscale x 8 x i64> %b)
127  %b.real = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %b.deinterleaved, 0
128  %b.imag = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i64> } %b.deinterleaved, 1
129  %1 = mul <vscale x 4 x i64> %b.real, %0
130  %2 = mul <vscale x 4 x i64> %b.imag, %a.imag
131  %3 = add <vscale x 4 x i64> %2, %1
132  %4 = mul <vscale x 4 x i64> %b.real, %a.imag
133  %5 = mul <vscale x 4 x i64> %b.imag, %0
134  %6 = sub <vscale x 4 x i64> %5, %4
135  %interleaved.vec = tail call <vscale x 8 x i64> @llvm.vector.interleave2.nxv8i64(<vscale x 4 x i64> %3, <vscale x 4 x i64> %6)
136  ret <vscale x 8 x i64> %interleaved.vec
137}
138
139declare { <vscale x 1 x i64>, <vscale x 1 x i64> } @llvm.vector.deinterleave2.nxv2i64(<vscale x 2 x i64>)
140declare <vscale x 2 x i64> @llvm.vector.interleave2.nxv2i64(<vscale x 1 x i64>, <vscale x 1 x i64>)
141
142declare { <vscale x 2 x i64>, <vscale x 2 x i64> } @llvm.vector.deinterleave2.nxv4i64(<vscale x 4 x i64>)
143declare <vscale x 4 x i64> @llvm.vector.interleave2.nxv4i64(<vscale x 2 x i64>, <vscale x 2 x i64>)
144
145declare { <vscale x 4 x i64>, <vscale x 4 x i64> } @llvm.vector.deinterleave2.nxv8i64(<vscale x 8 x i64>)
146declare <vscale x 8 x i64> @llvm.vector.interleave2.nxv8i64(<vscale x 4 x i64>, <vscale x 4 x i64>)
147