1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD 3; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16,+sve -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD 4; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16,+sve2 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD 5; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI 6; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16,+sve -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI 7; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16,+sve2 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI 8 9target triple = "aarch64" 10 11; CHECK-GI: warning: Instruction selection used fallback path for complex_add_v16f16 12; CHECK-GI-NEXT: warning: Instruction selection used fallback path for complex_add_v32f16 13; CHECK-GI-NEXT: warning: Instruction selection used fallback path for complex_add_v16f16_with_intrinsic 14 15; Expected to not transform 16define <2 x half> @complex_add_v2f16(<2 x half> %a, <2 x half> %b) { 17; CHECK-SD-LABEL: complex_add_v2f16: 18; CHECK-SD: // %bb.0: // %entry 19; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 20; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 21; CHECK-SD-NEXT: mov h2, v0.h[1] 22; CHECK-SD-NEXT: mov h3, v1.h[1] 23; CHECK-SD-NEXT: fsub h1, h1, h2 24; CHECK-SD-NEXT: fadd h0, h3, h0 25; CHECK-SD-NEXT: mov v1.h[1], v0.h[0] 26; CHECK-SD-NEXT: fmov d0, d1 27; CHECK-SD-NEXT: ret 28; 29; CHECK-GI-LABEL: complex_add_v2f16: 30; CHECK-GI: // %bb.0: // %entry 31; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 32; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 33; CHECK-GI-NEXT: mov h2, v0.h[1] 34; CHECK-GI-NEXT: mov h3, v1.h[1] 35; CHECK-GI-NEXT: fsub h1, h1, h2 36; CHECK-GI-NEXT: fadd h0, h3, h0 37; CHECK-GI-NEXT: mov v1.h[1], v0.h[0] 38; CHECK-GI-NEXT: fmov d0, d1 39; CHECK-GI-NEXT: ret 40entry: 41 %a.real = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 0> 42 %a.imag = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 1> 43 %b.real = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 0> 44 %b.imag = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 1> 45 %0 = fsub fast <1 x half> %b.real, %a.imag 46 %1 = fadd fast <1 x half> %b.imag, %a.real 47 %interleaved.vec = shufflevector <1 x half> %0, <1 x half> %1, <2 x i32> <i32 0, i32 1> 48 ret <2 x half> %interleaved.vec 49} 50 51; Expected to transform 52define <4 x half> @complex_add_v4f16(<4 x half> %a, <4 x half> %b) { 53; CHECK-LABEL: complex_add_v4f16: 54; CHECK: // %bb.0: // %entry 55; CHECK-NEXT: fcadd v0.4h, v1.4h, v0.4h, #90 56; CHECK-NEXT: ret 57entry: 58 %a.real = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2> 59 %a.imag = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3> 60 %b.real = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2> 61 %b.imag = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3> 62 %0 = fsub fast <2 x half> %b.real, %a.imag 63 %1 = fadd fast <2 x half> %b.imag, %a.real 64 %interleaved.vec = shufflevector <2 x half> %0, <2 x half> %1, <4 x i32> <i32 0, i32 2, i32 1, i32 3> 65 ret <4 x half> %interleaved.vec 66} 67 68; Expected to transform 69define <8 x half> @complex_add_v8f16(<8 x half> %a, <8 x half> %b) { 70; CHECK-LABEL: complex_add_v8f16: 71; CHECK: // %bb.0: // %entry 72; CHECK-NEXT: fcadd v0.8h, v1.8h, v0.8h, #90 73; CHECK-NEXT: ret 74entry: 75 %a.real = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 76 %a.imag = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 77 %b.real = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 78 %b.imag = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 79 %0 = fsub fast <4 x half> %b.real, %a.imag 80 %1 = fadd fast <4 x half> %b.imag, %a.real 81 %interleaved.vec = shufflevector <4 x half> %0, <4 x half> %1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> 82 ret <8 x half> %interleaved.vec 83} 84 85; Expected to transform 86define <16 x half> @complex_add_v16f16(<16 x half> %a, <16 x half> %b) { 87; CHECK-LABEL: complex_add_v16f16: 88; CHECK: // %bb.0: // %entry 89; CHECK-NEXT: fcadd v1.8h, v3.8h, v1.8h, #90 90; CHECK-NEXT: fcadd v0.8h, v2.8h, v0.8h, #90 91; CHECK-NEXT: ret 92entry: 93 %a.real = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 94 %a.imag = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 95 %b.real = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 96 %b.imag = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 97 %0 = fsub fast <8 x half> %b.real, %a.imag 98 %1 = fadd fast <8 x half> %b.imag, %a.real 99 %interleaved.vec = shufflevector <8 x half> %0, <8 x half> %1, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 100 ret <16 x half> %interleaved.vec 101} 102 103; Expected to transform 104define <32 x half> @complex_add_v32f16(<32 x half> %a, <32 x half> %b) { 105; CHECK-LABEL: complex_add_v32f16: 106; CHECK: // %bb.0: // %entry 107; CHECK-NEXT: fcadd v2.8h, v6.8h, v2.8h, #90 108; CHECK-NEXT: fcadd v0.8h, v4.8h, v0.8h, #90 109; CHECK-NEXT: fcadd v1.8h, v5.8h, v1.8h, #90 110; CHECK-NEXT: fcadd v3.8h, v7.8h, v3.8h, #90 111; CHECK-NEXT: ret 112entry: 113 %a.real = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 114 %a.imag = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 115 %b.real = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 116 %b.imag = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 117 %0 = fsub fast <16 x half> %b.real, %a.imag 118 %1 = fadd fast <16 x half> %b.imag, %a.real 119 %interleaved.vec = shufflevector <16 x half> %0, <16 x half> %1, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 120 ret <32 x half> %interleaved.vec 121} 122 123; Expected to transform 124define <4 x half> @complex_add_v4f16_with_intrinsic(<4 x half> %a, <4 x half> %b) { 125; CHECK-LABEL: complex_add_v4f16_with_intrinsic: 126; CHECK: // %bb.0: // %entry 127; CHECK-NEXT: fcadd v0.4h, v1.4h, v0.4h, #90 128; CHECK-NEXT: ret 129entry: 130 %a.deinterleaved = tail call { <2 x half>, <2 x half> } @llvm.vector.deinterleave2.v4f16(<4 x half> %a) 131 %a.real = extractvalue { <2 x half>, <2 x half> } %a.deinterleaved, 0 132 %a.imag = extractvalue { <2 x half>, <2 x half> } %a.deinterleaved, 1 133 %b.deinterleaved = tail call { <2 x half>, <2 x half> } @llvm.vector.deinterleave2.v4f16(<4 x half> %b) 134 %b.real = extractvalue { <2 x half>, <2 x half> } %b.deinterleaved, 0 135 %b.imag = extractvalue { <2 x half>, <2 x half> } %b.deinterleaved, 1 136 %0 = fsub fast <2 x half> %b.real, %a.imag 137 %1 = fadd fast <2 x half> %b.imag, %a.real 138 %interleaved.vec = tail call <4 x half> @llvm.vector.interleave2.v4f16(<2 x half> %0, <2 x half> %1) 139 ret <4 x half> %interleaved.vec 140} 141 142; Expected to transform 143define <8 x half> @complex_add_v8f16_with_intrinsic(<8 x half> %a, <8 x half> %b) { 144; CHECK-LABEL: complex_add_v8f16_with_intrinsic: 145; CHECK: // %bb.0: // %entry 146; CHECK-NEXT: fcadd v0.8h, v1.8h, v0.8h, #90 147; CHECK-NEXT: ret 148entry: 149 %a.deinterleaved = tail call { <4 x half>, <4 x half> } @llvm.vector.deinterleave2.v8f16(<8 x half> %a) 150 %a.real = extractvalue { <4 x half>, <4 x half> } %a.deinterleaved, 0 151 %a.imag = extractvalue { <4 x half>, <4 x half> } %a.deinterleaved, 1 152 %b.deinterleaved = tail call { <4 x half>, <4 x half> } @llvm.vector.deinterleave2.v8f16(<8 x half> %b) 153 %b.real = extractvalue { <4 x half>, <4 x half> } %b.deinterleaved, 0 154 %b.imag = extractvalue { <4 x half>, <4 x half> } %b.deinterleaved, 1 155 %0 = fsub fast <4 x half> %b.real, %a.imag 156 %1 = fadd fast <4 x half> %b.imag, %a.real 157 %interleaved.vec = tail call <8 x half> @llvm.vector.interleave2.v8f16(<4 x half> %0, <4 x half> %1) 158 ret <8 x half> %interleaved.vec 159} 160 161; Expected to transform 162define <16 x half> @complex_add_v16f16_with_intrinsic(<16 x half> %a, <16 x half> %b) { 163; CHECK-LABEL: complex_add_v16f16_with_intrinsic: 164; CHECK: // %bb.0: // %entry 165; CHECK-NEXT: fcadd v1.8h, v3.8h, v1.8h, #90 166; CHECK-NEXT: fcadd v0.8h, v2.8h, v0.8h, #90 167; CHECK-NEXT: ret 168entry: 169 %a.deinterleaved = tail call { <8 x half>, <8 x half> } @llvm.vector.deinterleave2.v16f16(<16 x half> %a) 170 %a.real = extractvalue { <8 x half>, <8 x half> } %a.deinterleaved, 0 171 %a.imag = extractvalue { <8 x half>, <8 x half> } %a.deinterleaved, 1 172 %b.deinterleaved = tail call { <8 x half>, <8 x half> } @llvm.vector.deinterleave2.v16f16(<16 x half> %b) 173 %b.real = extractvalue { <8 x half>, <8 x half> } %b.deinterleaved, 0 174 %b.imag = extractvalue { <8 x half>, <8 x half> } %b.deinterleaved, 1 175 %0 = fsub fast <8 x half> %b.real, %a.imag 176 %1 = fadd fast <8 x half> %b.imag, %a.real 177 %interleaved.vec = tail call <16 x half> @llvm.vector.interleave2.v16f16(<8 x half> %0, <8 x half> %1) 178 ret <16 x half> %interleaved.vec 179} 180 181 182; Expected not to transform as it is integer 183define <16 x i16> @complex_add_v16i16(<16 x i16> %a, <16 x i16> %b) { 184; CHECK-SD-LABEL: complex_add_v16i16: 185; CHECK-SD: // %bb.0: // %entry 186; CHECK-SD-NEXT: uzp1 v4.8h, v2.8h, v3.8h 187; CHECK-SD-NEXT: uzp1 v5.8h, v0.8h, v1.8h 188; CHECK-SD-NEXT: uzp2 v0.8h, v0.8h, v1.8h 189; CHECK-SD-NEXT: uzp2 v1.8h, v2.8h, v3.8h 190; CHECK-SD-NEXT: sub v2.8h, v4.8h, v0.8h 191; CHECK-SD-NEXT: add v1.8h, v1.8h, v5.8h 192; CHECK-SD-NEXT: zip1 v0.8h, v2.8h, v1.8h 193; CHECK-SD-NEXT: zip2 v1.8h, v2.8h, v1.8h 194; CHECK-SD-NEXT: ret 195; 196; CHECK-GI-LABEL: complex_add_v16i16: 197; CHECK-GI: // %bb.0: // %entry 198; CHECK-GI-NEXT: uzp1 v4.8h, v0.8h, v1.8h 199; CHECK-GI-NEXT: uzp2 v0.8h, v0.8h, v1.8h 200; CHECK-GI-NEXT: uzp1 v1.8h, v2.8h, v3.8h 201; CHECK-GI-NEXT: uzp2 v2.8h, v2.8h, v3.8h 202; CHECK-GI-NEXT: sub v1.8h, v1.8h, v0.8h 203; CHECK-GI-NEXT: add v2.8h, v2.8h, v4.8h 204; CHECK-GI-NEXT: zip1 v0.8h, v1.8h, v2.8h 205; CHECK-GI-NEXT: zip2 v1.8h, v1.8h, v2.8h 206; CHECK-GI-NEXT: ret 207entry: 208 %a.real = shufflevector <16 x i16> %a, <16 x i16> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 209 %a.imag = shufflevector <16 x i16> %a, <16 x i16> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 210 %b.real = shufflevector <16 x i16> %b, <16 x i16> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 211 %b.imag = shufflevector <16 x i16> %b, <16 x i16> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 212 %0 = sub <8 x i16> %b.real, %a.imag 213 %1 = add <8 x i16> %b.imag, %a.real 214 %interleaved.vec = shufflevector <8 x i16> %0, <8 x i16> %1, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 215 ret <16 x i16> %interleaved.vec 216} 217 218 219declare { <2 x half>, <2 x half> } @llvm.vector.deinterleave2.v4f16(<4 x half>) 220declare <4 x half> @llvm.vector.interleave2.v4f16(<2 x half>, <2 x half>) 221 222declare { <4 x half>, <4 x half> } @llvm.vector.deinterleave2.v8f16(<8 x half>) 223declare <8 x half> @llvm.vector.interleave2.v8f16(<4 x half>, <4 x half>) 224 225declare { <8 x half>, <8 x half> } @llvm.vector.deinterleave2.v16f16(<16 x half>) 226declare <16 x half> @llvm.vector.interleave2.v16f16(<8 x half>, <8 x half>) 227