xref: /llvm-project/llvm/test/CodeGen/AArch64/cmpxchg-lse-even-regs.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb)
1; RUN: llc -mtriple arm64-apple-ios -mattr=+lse %s -o - | FileCheck %s
2; RUN: llc -mtriple arm64-apple-ios -mattr=+lse -mattr=+outline-atomics %s -o - | FileCheck %s
3
4; Only "even,even+1" pairs are valid for CASP instructions. Make sure LLVM
5; doesn't allocate odd ones and that it can copy them around properly. N.b. we
6; don't actually check that they're sequential because FileCheck can't; odd/even
7; will have to be good enough.
8define void @test_atomic_cmpxchg_i128_register_shuffling(ptr %addr, i128 %desired, i128 %new) nounwind {
9; CHECK-LABEL: test_atomic_cmpxchg_i128_register_shuffling:
10; CHECK-DAG: mov [[DESIRED_LO:x[0-9]*[02468]]], x1
11; CHECK-DAG: mov [[DESIRED_HI:x[0-9]*[13579]]], x2
12; CHECK-DAG: mov [[NEW_LO:x[0-9]*[02468]]], x3
13; CHECK-DAG: mov [[NEW_HI:x[0-9]*[13579]]], x4
14; CHECK: caspal [[DESIRED_LO]], [[DESIRED_HI]], [[NEW_LO]], [[NEW_HI]], [x0]
15
16  %res = cmpxchg ptr %addr, i128 %desired, i128 %new seq_cst seq_cst
17  ret void
18}
19