xref: /llvm-project/llvm/test/CodeGen/AArch64/bswap-known-bits.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-apple-darwin  | FileCheck %s
3
4declare i16 @llvm.bswap.i16(i16)
5declare i32 @llvm.bswap.i32(i32)
6declare i64 @llvm.bswap.i64(i64)
7
8define i1 @test1(i16 %arg) {
9; CHECK-LABEL: test1:
10; CHECK:       ; %bb.0:
11; CHECK-NEXT:    mov w0, #1
12; CHECK-NEXT:    ret
13  %a = or i16 %arg, 511
14  %b = call i16 @llvm.bswap.i16(i16 %a)
15  %and = and i16 %b, 256
16  %res = icmp eq i16 %and, 256
17  ret i1 %res
18}
19
20define i1 @test2(i16 %arg) {
21; CHECK-LABEL: test2:
22; CHECK:       ; %bb.0:
23; CHECK-NEXT:    mov w0, #1
24; CHECK-NEXT:    ret
25  %a = or i16 %arg, 1
26  %b = call i16 @llvm.bswap.i16(i16 %a)
27  %and = and i16 %b, 256
28  %res = icmp eq i16 %and, 256
29  ret i1 %res
30}
31
32define i1 @test3(i16 %arg) {
33; CHECK-LABEL: test3:
34; CHECK:       ; %bb.0:
35; CHECK-NEXT:    mov w0, #1
36; CHECK-NEXT:    ret
37  %a = or i16 %arg, 256
38  %b = call i16 @llvm.bswap.i16(i16 %a)
39  %and = and i16 %b, 1
40  %res = icmp eq i16 %and, 1
41  ret i1 %res
42}
43
44define i1 @test4(i32 %arg) {
45; CHECK-LABEL: test4:
46; CHECK:       ; %bb.0:
47; CHECK-NEXT:    mov w0, #1
48; CHECK-NEXT:    ret
49  %a = or i32 %arg, 2147483647  ; i32_MAX
50  %b = call i32 @llvm.bswap.i32(i32 %a)
51  %and = and i32 %b, 127
52  %res = icmp eq i32 %and, 127
53  ret i1 %res
54}
55
56define i8 @demand_one_byte0(i32 %x) {
57; CHECK-LABEL: demand_one_byte0:
58; CHECK:       ; %bb.0:
59; CHECK-NEXT:    rev w0, w0
60; CHECK-NEXT:    ret
61  %b = call i32 @llvm.bswap.i32(i32 %x)
62  %r = trunc i32 %b to i8
63  ret i8 %r
64}
65
66define i32 @demand_one_byte1(i32 %x) {
67; CHECK-LABEL: demand_one_byte1:
68; CHECK:       ; %bb.0:
69; CHECK-NEXT:    lsr w8, w0, #8
70; CHECK-NEXT:    and w0, w8, #0xff00
71; CHECK-NEXT:    ret
72  %b = call i32 @llvm.bswap.i32(i32 %x)
73  %r = and i32 %b, 65280 ; 0x0000ff00
74  ret i32 %r
75}
76
77define i32 @demand_one_byte2(i32 %x) {
78; CHECK-LABEL: demand_one_byte2:
79; CHECK:       ; %bb.0:
80; CHECK-NEXT:    lsl w8, w0, #8
81; CHECK-NEXT:    orr w0, w8, #0xff00ffff
82; CHECK-NEXT:    ret
83  %b = call i32 @llvm.bswap.i32(i32 %x)
84  %r = or i32 %b, 4278255615 ; 0xff00ffff
85  ret i32 %r
86}
87
88define i64 @demand_one_byte3(i64 %x) {
89; CHECK-LABEL: demand_one_byte3:
90; CHECK:       ; %bb.0:
91; CHECK-NEXT:    and x0, x0, #0xff
92; CHECK-NEXT:    ret
93  %b = call i64 @llvm.bswap.i64(i64 %x)
94  %r = lshr i64 %b, 56
95  ret i64 %r
96}
97
98define void @demand_one_loaded_byte(ptr %xp, ptr %yp) {
99; CHECK-LABEL: demand_one_loaded_byte:
100; CHECK:       ; %bb.0:
101; CHECK-NEXT:    ldrb w8, [x0, #4]
102; CHECK-NEXT:    strb w8, [x1]
103; CHECK-NEXT:    ret
104  %x = load i64, ptr %xp, align 8
105  %x_zzzz7654 = lshr i64 %x, 32
106  %x_z7654zzz = shl nuw nsw i64 %x_zzzz7654, 24
107  %x_4zzz = trunc i64 %x_z7654zzz to i32
108  %y = load i32, ptr %yp, align 4
109  %y_321z = and i32 %y, -256
110  %x_zzz4 = call i32 @llvm.bswap.i32(i32 %x_4zzz)
111  %r = or i32 %x_zzz4, %y_321z
112  store i32 %r, ptr %yp, align 4
113  ret void
114}
115