xref: /llvm-project/llvm/test/CodeGen/AArch64/branch-relax-bcc.ll (revision db158c7c830807caeeb0691739c41f1d522029e9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s
3
4define i32 @invert_bcc(float %x, float %y) #0 {
5; CHECK-LABEL: invert_bcc:
6; CHECK:       ; %bb.0:
7; CHECK-NEXT:    fcmp s0, s1
8; CHECK-NEXT:    mov w0, wzr
9; CHECK-NEXT:    mov w8, #42 ; =0x2a
10; CHECK-NEXT:    b.pl LBB0_3
11; CHECK-NEXT:    b LBB0_2
12; CHECK-NEXT:  LBB0_3:
13; CHECK-NEXT:    b.gt LBB0_2
14; CHECK-NEXT:  ; %bb.1: ; %common.ret
15; CHECK-NEXT:    str w8, [x8]
16; CHECK-NEXT:    ret
17; CHECK-NEXT:  LBB0_2: ; %bb2
18; CHECK-NEXT:    mov w0, #1 ; =0x1
19; CHECK-NEXT:    mov w8, #9 ; =0x9
20; CHECK-NEXT:    ; InlineAsm Start
21; CHECK-NEXT:    nop
22; CHECK-NEXT:    nop
23; CHECK-NEXT:    ; InlineAsm End
24; CHECK-NEXT:    str w8, [x8]
25; CHECK-NEXT:    ret
26  %1 = fcmp ueq float %x, %y
27  br i1 %1, label %bb1, label %bb2
28
29bb2:
30  call void asm sideeffect
31    "nop
32     nop",
33    ""() #0
34  store volatile i32 9, ptr undef
35  ret i32 1
36
37bb1:
38  store volatile i32 42, ptr undef
39  ret i32 0
40}
41
42declare i32 @foo() #0
43
44define i32 @block_split(i32 %a, i32 %b) #0 {
45; CHECK-LABEL: block_split:
46; CHECK:       ; %bb.0: ; %entry
47; CHECK-NEXT:    cmp w0, #5
48; CHECK-NEXT:    b.ne LBB1_1
49; CHECK-NEXT:    b LBB1_2
50; CHECK-NEXT:  LBB1_1: ; %lor.lhs.false
51; CHECK-NEXT:    lsl w8, w1, #1
52; CHECK-NEXT:    cmp w1, #7
53; CHECK-NEXT:    csinc w8, w8, w1, lt
54; CHECK-NEXT:    cmp w8, #16
55; CHECK-NEXT:    b.le LBB1_2
56; CHECK-NEXT:    b LBB1_3
57; CHECK-NEXT:  LBB1_2: ; %if.then
58; CHECK-NEXT:    stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
59; CHECK-NEXT:    bl _foo
60; CHECK-NEXT:    ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
61; CHECK-NEXT:  LBB1_3: ; %if.end
62; CHECK-NEXT:    mov w0, #7 ; =0x7
63; CHECK-NEXT:    ret
64entry:
65  %cmp = icmp eq i32 %a, 5
66  br i1 %cmp, label %if.then, label %lor.lhs.false
67
68lor.lhs.false:                                    ; preds = %entry
69  %cmp1 = icmp slt i32 %b, 7
70  %mul = shl nsw i32 %b, 1
71  %add = add nsw i32 %b, 1
72  %cond = select i1 %cmp1, i32 %mul, i32 %add
73  %cmp2 = icmp slt i32 %cond, 17
74  br i1 %cmp2, label %if.then, label %if.end
75
76if.then:                                          ; preds = %lor.lhs.false, %entry
77  %call = tail call i32 @foo()
78  br label %if.end
79
80if.end:                                           ; preds = %if.then, %lor.lhs.false
81  ret i32 7
82}
83
84attributes #0 = { nounwind }
85