xref: /llvm-project/llvm/test/CodeGen/AArch64/br-undef-cond.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb)
1; RUN: llc < %s -verify-machineinstrs
2
3; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
4
5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6target triple = "arm64-apple-ios"
7
8declare void @bar(ptr)
9
10define void @foo(ptr %m, i32 %off0) {
11.thread1653:
12  br i1 undef, label %0, label %.thread1880
13
14  %1 = icmp eq i32 undef, 0
15  %.not = xor i1 %1, true
16  %brmerge = or i1 %.not, undef
17  br i1 %brmerge, label %.thread1880, label %.thread1705
18
19.thread1705:
20  ret void
21
22.thread1880:
23  %m1652.ph = phi ptr [ %m, %0 ], [ null, %.thread1653 ]
24  call void @bar(ptr %m1652.ph)
25  ret void
26}
27