1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 -mattr=+bf16 | FileCheck %s 3 4define <4 x i16> @v4bf16_to_v4i16(float, <4 x bfloat> %a) nounwind { 5; CHECK-LABEL: v4bf16_to_v4i16: 6; CHECK: // %bb.0: // %entry 7; CHECK-NEXT: fmov d0, d1 8; CHECK-NEXT: ret 9entry: 10 %1 = bitcast <4 x bfloat> %a to <4 x i16> 11 ret <4 x i16> %1 12} 13 14define <2 x i32> @v4bf16_to_v2i32(float, <4 x bfloat> %a) nounwind { 15; CHECK-LABEL: v4bf16_to_v2i32: 16; CHECK: // %bb.0: // %entry 17; CHECK-NEXT: fmov d0, d1 18; CHECK-NEXT: ret 19entry: 20 %1 = bitcast <4 x bfloat> %a to <2 x i32> 21 ret <2 x i32> %1 22} 23 24define <1 x i64> @v4bf16_to_v1i64(float, <4 x bfloat> %a) nounwind { 25; CHECK-LABEL: v4bf16_to_v1i64: 26; CHECK: // %bb.0: // %entry 27; CHECK-NEXT: fmov d0, d1 28; CHECK-NEXT: ret 29entry: 30 %1 = bitcast <4 x bfloat> %a to <1 x i64> 31 ret <1 x i64> %1 32} 33 34define i64 @v4bf16_to_i64(float, <4 x bfloat> %a) nounwind { 35; CHECK-LABEL: v4bf16_to_i64: 36; CHECK: // %bb.0: // %entry 37; CHECK-NEXT: fmov x0, d1 38; CHECK-NEXT: ret 39entry: 40 %1 = bitcast <4 x bfloat> %a to i64 41 ret i64 %1 42} 43 44define <2 x float> @v4bf16_to_v2float(float, <4 x bfloat> %a) nounwind { 45; CHECK-LABEL: v4bf16_to_v2float: 46; CHECK: // %bb.0: // %entry 47; CHECK-NEXT: fmov d0, d1 48; CHECK-NEXT: ret 49entry: 50 %1 = bitcast <4 x bfloat> %a to <2 x float> 51 ret <2 x float> %1 52} 53 54define <1 x double> @v4bf16_to_v1double(float, <4 x bfloat> %a) nounwind { 55; CHECK-LABEL: v4bf16_to_v1double: 56; CHECK: // %bb.0: // %entry 57; CHECK-NEXT: fmov d0, d1 58; CHECK-NEXT: ret 59entry: 60 %1 = bitcast <4 x bfloat> %a to <1 x double> 61 ret <1 x double> %1 62} 63 64define double @v4bf16_to_double(float, <4 x bfloat> %a) nounwind { 65; CHECK-LABEL: v4bf16_to_double: 66; CHECK: // %bb.0: // %entry 67; CHECK-NEXT: fmov d0, d1 68; CHECK-NEXT: ret 69entry: 70 %1 = bitcast <4 x bfloat> %a to double 71 ret double %1 72} 73 74 75define <4 x bfloat> @v4i16_to_v4bf16(float, <4 x i16> %a) nounwind { 76; CHECK-LABEL: v4i16_to_v4bf16: 77; CHECK: // %bb.0: // %entry 78; CHECK-NEXT: fmov d0, d1 79; CHECK-NEXT: ret 80entry: 81 %1 = bitcast <4 x i16> %a to <4 x bfloat> 82 ret <4 x bfloat> %1 83} 84 85define <4 x bfloat> @v2i32_to_v4bf16(float, <2 x i32> %a) nounwind { 86; CHECK-LABEL: v2i32_to_v4bf16: 87; CHECK: // %bb.0: // %entry 88; CHECK-NEXT: fmov d0, d1 89; CHECK-NEXT: ret 90entry: 91 %1 = bitcast <2 x i32> %a to <4 x bfloat> 92 ret <4 x bfloat> %1 93} 94 95define <4 x bfloat> @v1i64_to_v4bf16(float, <1 x i64> %a) nounwind { 96; CHECK-LABEL: v1i64_to_v4bf16: 97; CHECK: // %bb.0: // %entry 98; CHECK-NEXT: fmov d0, d1 99; CHECK-NEXT: ret 100entry: 101 %1 = bitcast <1 x i64> %a to <4 x bfloat> 102 ret <4 x bfloat> %1 103} 104 105define <4 x bfloat> @i64_to_v4bf16(float, i64 %a) nounwind { 106; CHECK-LABEL: i64_to_v4bf16: 107; CHECK: // %bb.0: // %entry 108; CHECK-NEXT: fmov d0, x0 109; CHECK-NEXT: ret 110entry: 111 %1 = bitcast i64 %a to <4 x bfloat> 112 ret <4 x bfloat> %1 113} 114 115define <4 x bfloat> @v2float_to_v4bf16(float, <2 x float> %a) nounwind { 116; CHECK-LABEL: v2float_to_v4bf16: 117; CHECK: // %bb.0: // %entry 118; CHECK-NEXT: fmov d0, d1 119; CHECK-NEXT: ret 120entry: 121 %1 = bitcast <2 x float> %a to <4 x bfloat> 122 ret <4 x bfloat> %1 123} 124 125define <4 x bfloat> @v1double_to_v4bf16(float, <1 x double> %a) nounwind { 126; CHECK-LABEL: v1double_to_v4bf16: 127; CHECK: // %bb.0: // %entry 128; CHECK-NEXT: fmov d0, d1 129; CHECK-NEXT: ret 130entry: 131 %1 = bitcast <1 x double> %a to <4 x bfloat> 132 ret <4 x bfloat> %1 133} 134 135define <4 x bfloat> @double_to_v4bf16(float, double %a) nounwind { 136; CHECK-LABEL: double_to_v4bf16: 137; CHECK: // %bb.0: // %entry 138; CHECK-NEXT: fmov d0, d1 139; CHECK-NEXT: ret 140entry: 141 %1 = bitcast double %a to <4 x bfloat> 142 ret <4 x bfloat> %1 143} 144 145define <8 x i16> @v8bf16_to_v8i16(float, <8 x bfloat> %a) nounwind { 146; CHECK-LABEL: v8bf16_to_v8i16: 147; CHECK: // %bb.0: // %entry 148; CHECK-NEXT: mov v0.16b, v1.16b 149; CHECK-NEXT: ret 150entry: 151 %1 = bitcast <8 x bfloat> %a to <8 x i16> 152 ret <8 x i16> %1 153} 154 155define <4 x i32> @v8bf16_to_v4i32(float, <8 x bfloat> %a) nounwind { 156; CHECK-LABEL: v8bf16_to_v4i32: 157; CHECK: // %bb.0: // %entry 158; CHECK-NEXT: mov v0.16b, v1.16b 159; CHECK-NEXT: ret 160entry: 161 %1 = bitcast <8 x bfloat> %a to <4 x i32> 162 ret <4 x i32> %1 163} 164 165define <2 x i64> @v8bf16_to_v2i64(float, <8 x bfloat> %a) nounwind { 166; CHECK-LABEL: v8bf16_to_v2i64: 167; CHECK: // %bb.0: // %entry 168; CHECK-NEXT: mov v0.16b, v1.16b 169; CHECK-NEXT: ret 170entry: 171 %1 = bitcast <8 x bfloat> %a to <2 x i64> 172 ret <2 x i64> %1 173} 174 175define <4 x float> @v8bf16_to_v4float(float, <8 x bfloat> %a) nounwind { 176; CHECK-LABEL: v8bf16_to_v4float: 177; CHECK: // %bb.0: // %entry 178; CHECK-NEXT: mov v0.16b, v1.16b 179; CHECK-NEXT: ret 180entry: 181 %1 = bitcast <8 x bfloat> %a to <4 x float> 182 ret <4 x float> %1 183} 184 185define <2 x double> @v8bf16_to_v2double(float, <8 x bfloat> %a) nounwind { 186; CHECK-LABEL: v8bf16_to_v2double: 187; CHECK: // %bb.0: // %entry 188; CHECK-NEXT: mov v0.16b, v1.16b 189; CHECK-NEXT: ret 190entry: 191 %1 = bitcast <8 x bfloat> %a to <2 x double> 192 ret <2 x double> %1 193} 194 195define <8 x bfloat> @v8i16_to_v8bf16(float, <8 x i16> %a) nounwind { 196; CHECK-LABEL: v8i16_to_v8bf16: 197; CHECK: // %bb.0: // %entry 198; CHECK-NEXT: mov v0.16b, v1.16b 199; CHECK-NEXT: ret 200entry: 201 %1 = bitcast <8 x i16> %a to <8 x bfloat> 202 ret <8 x bfloat> %1 203} 204 205define <8 x bfloat> @v4i32_to_v8bf16(float, <4 x i32> %a) nounwind { 206; CHECK-LABEL: v4i32_to_v8bf16: 207; CHECK: // %bb.0: // %entry 208; CHECK-NEXT: mov v0.16b, v1.16b 209; CHECK-NEXT: ret 210entry: 211 %1 = bitcast <4 x i32> %a to <8 x bfloat> 212 ret <8 x bfloat> %1 213} 214 215define <8 x bfloat> @v2i64_to_v8bf16(float, <2 x i64> %a) nounwind { 216; CHECK-LABEL: v2i64_to_v8bf16: 217; CHECK: // %bb.0: // %entry 218; CHECK-NEXT: mov v0.16b, v1.16b 219; CHECK-NEXT: ret 220entry: 221 %1 = bitcast <2 x i64> %a to <8 x bfloat> 222 ret <8 x bfloat> %1 223} 224 225define <8 x bfloat> @v4float_to_v8bf16(float, <4 x float> %a) nounwind { 226; CHECK-LABEL: v4float_to_v8bf16: 227; CHECK: // %bb.0: // %entry 228; CHECK-NEXT: mov v0.16b, v1.16b 229; CHECK-NEXT: ret 230entry: 231 %1 = bitcast <4 x float> %a to <8 x bfloat> 232 ret <8 x bfloat> %1 233} 234 235define <8 x bfloat> @v2double_to_v8bf16(float, <2 x double> %a) nounwind { 236; CHECK-LABEL: v2double_to_v8bf16: 237; CHECK: // %bb.0: // %entry 238; CHECK-NEXT: mov v0.16b, v1.16b 239; CHECK-NEXT: ret 240entry: 241 %1 = bitcast <2 x double> %a to <8 x bfloat> 242 ret <8 x bfloat> %1 243} 244