xref: /llvm-project/llvm/test/CodeGen/AArch64/bf16-select.ll (revision a9e9dd9a3a44d88cda85d0b26778c80faf5355d2)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple aarch64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-BASE
3; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fullfp16 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FP16
4; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+bf16 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-BASE
5; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+bf16,+fullfp16 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FP16
6
7define bfloat @test_select(bfloat %a, bfloat %b, i1 zeroext %c) {
8; CHECK-BASE-LABEL: test_select:
9; CHECK-BASE:       // %bb.0:
10; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 def $s0
11; CHECK-BASE-NEXT:    cmp w0, #0
12; CHECK-BASE-NEXT:    // kill: def $h1 killed $h1 def $s1
13; CHECK-BASE-NEXT:    fcsel s0, s0, s1, ne
14; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 killed $s0
15; CHECK-BASE-NEXT:    ret
16;
17; CHECK-FP16-LABEL: test_select:
18; CHECK-FP16:       // %bb.0:
19; CHECK-FP16-NEXT:    cmp w0, #0
20; CHECK-FP16-NEXT:    fcsel h0, h0, h1, ne
21; CHECK-FP16-NEXT:    ret
22  %r = select i1 %c, bfloat %a, bfloat %b
23  ret bfloat %r
24}
25
26define bfloat @test_select_fcc(bfloat %a, bfloat %b, float %c, float %d) {
27; CHECK-BASE-LABEL: test_select_fcc:
28; CHECK-BASE:       // %bb.0:
29; CHECK-BASE-NEXT:    fcmp s2, s3
30; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 def $s0
31; CHECK-BASE-NEXT:    // kill: def $h1 killed $h1 def $s1
32; CHECK-BASE-NEXT:    fcsel s0, s0, s1, ne
33; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 killed $s0
34; CHECK-BASE-NEXT:    ret
35;
36; CHECK-FP16-LABEL: test_select_fcc:
37; CHECK-FP16:       // %bb.0:
38; CHECK-FP16-NEXT:    fcmp s2, s3
39; CHECK-FP16-NEXT:    fcsel h0, h0, h1, ne
40; CHECK-FP16-NEXT:    ret
41  %cc = fcmp une float %c, %d
42  %r = select i1 %cc, bfloat %a, bfloat %b
43  ret bfloat %r
44}
45
46define bfloat @test_select_icc(bfloat %a, bfloat %b, i32 %c, i32 %d) {
47; CHECK-BASE-LABEL: test_select_icc:
48; CHECK-BASE:       // %bb.0:
49; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 def $s0
50; CHECK-BASE-NEXT:    cmp w0, w1
51; CHECK-BASE-NEXT:    // kill: def $h1 killed $h1 def $s1
52; CHECK-BASE-NEXT:    fcsel s0, s0, s1, ne
53; CHECK-BASE-NEXT:    // kill: def $h0 killed $h0 killed $s0
54; CHECK-BASE-NEXT:    ret
55;
56; CHECK-FP16-LABEL: test_select_icc:
57; CHECK-FP16:       // %bb.0:
58; CHECK-FP16-NEXT:    cmp w0, w1
59; CHECK-FP16-NEXT:    fcsel h0, h0, h1, ne
60; CHECK-FP16-NEXT:    ret
61  %cc = icmp ne i32 %c, %d
62  %r = select i1 %cc, bfloat %a, bfloat %b
63  ret bfloat %r
64}
65