xref: /llvm-project/llvm/test/CodeGen/AArch64/bf16-imm.ll (revision 778fa4edaf207bd2fef3635ceb8782e325ded76a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
3; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
4
5define bfloat @Const0() {
6; CHECK-LABEL: Const0:
7; CHECK:       // %bb.0: // %entry
8; CHECK-NEXT:    movi d0, #0000000000000000
9; CHECK-NEXT:    ret
10entry:
11  ret bfloat 0xR0000
12}
13
14define bfloat @Const1() {
15; CHECK-FP16-LABEL: Const1:
16; CHECK-FP16:       // %bb.0: // %entry
17; CHECK-FP16-NEXT:    fmov h0, #1.00000000
18; CHECK-FP16-NEXT:    ret
19;
20; CHECK-NOFP16-LABEL: Const1:
21; CHECK-NOFP16:       // %bb.0: // %entry
22; CHECK-NOFP16-NEXT:    adrp x8, .LCPI1_0
23; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI1_0]
24; CHECK-NOFP16-NEXT:    ret
25entry:
26  ret bfloat 0xR3C00
27}
28
29define bfloat @Const2() {
30; CHECK-FP16-LABEL: Const2:
31; CHECK-FP16:       // %bb.0: // %entry
32; CHECK-FP16-NEXT:    fmov h0, #0.12500000
33; CHECK-FP16-NEXT:    ret
34;
35; CHECK-NOFP16-LABEL: Const2:
36; CHECK-NOFP16:       // %bb.0: // %entry
37; CHECK-NOFP16-NEXT:    adrp x8, .LCPI2_0
38; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI2_0]
39; CHECK-NOFP16-NEXT:    ret
40entry:
41  ret bfloat 0xR3000
42}
43
44define bfloat @Const3() {
45; CHECK-FP16-LABEL: Const3:
46; CHECK-FP16:       // %bb.0: // %entry
47; CHECK-FP16-NEXT:    fmov h0, #30.00000000
48; CHECK-FP16-NEXT:    ret
49;
50; CHECK-NOFP16-LABEL: Const3:
51; CHECK-NOFP16:       // %bb.0: // %entry
52; CHECK-NOFP16-NEXT:    adrp x8, .LCPI3_0
53; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI3_0]
54; CHECK-NOFP16-NEXT:    ret
55entry:
56  ret bfloat 0xR4F80
57}
58
59define bfloat @Const4() {
60; CHECK-FP16-LABEL: Const4:
61; CHECK-FP16:       // %bb.0: // %entry
62; CHECK-FP16-NEXT:    fmov h0, #31.00000000
63; CHECK-FP16-NEXT:    ret
64;
65; CHECK-NOFP16-LABEL: Const4:
66; CHECK-NOFP16:       // %bb.0: // %entry
67; CHECK-NOFP16-NEXT:    adrp x8, .LCPI4_0
68; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI4_0]
69; CHECK-NOFP16-NEXT:    ret
70entry:
71  ret bfloat 0xR4FC0
72}
73
74define bfloat @Const5() {
75; CHECK-FP16-LABEL: Const5:
76; CHECK-FP16:       // %bb.0: // %entry
77; CHECK-FP16-NEXT:    mov w8, #12272 // =0x2ff0
78; CHECK-FP16-NEXT:    fmov h0, w8
79; CHECK-FP16-NEXT:    ret
80;
81; CHECK-NOFP16-LABEL: Const5:
82; CHECK-NOFP16:       // %bb.0: // %entry
83; CHECK-NOFP16-NEXT:    adrp x8, .LCPI5_0
84; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI5_0]
85; CHECK-NOFP16-NEXT:    ret
86entry:
87  ret bfloat 0xR2FF0
88}
89
90define bfloat @Const6() {
91; CHECK-FP16-LABEL: Const6:
92; CHECK-FP16:       // %bb.0: // %entry
93; CHECK-FP16-NEXT:    mov w8, #20417 // =0x4fc1
94; CHECK-FP16-NEXT:    fmov h0, w8
95; CHECK-FP16-NEXT:    ret
96;
97; CHECK-NOFP16-LABEL: Const6:
98; CHECK-NOFP16:       // %bb.0: // %entry
99; CHECK-NOFP16-NEXT:    adrp x8, .LCPI6_0
100; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI6_0]
101; CHECK-NOFP16-NEXT:    ret
102entry:
103  ret bfloat 0xR4FC1
104}
105
106define bfloat @Const7() {
107; CHECK-FP16-LABEL: Const7:
108; CHECK-FP16:       // %bb.0: // %entry
109; CHECK-FP16-NEXT:    mov w8, #20480 // =0x5000
110; CHECK-FP16-NEXT:    fmov h0, w8
111; CHECK-FP16-NEXT:    ret
112;
113; CHECK-NOFP16-LABEL: Const7:
114; CHECK-NOFP16:       // %bb.0: // %entry
115; CHECK-NOFP16-NEXT:    adrp x8, .LCPI7_0
116; CHECK-NOFP16-NEXT:    ldr h0, [x8, :lo12:.LCPI7_0]
117; CHECK-NOFP16-NEXT:    ret
118entry:
119  ret bfloat 0xR5000
120}
121
122