xref: /llvm-project/llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll (revision 7f292b8fb12aed094b8422aad9fcb7b2907c54c9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
3
4define <16 x i8> @lower_trunc_16xi8(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f, i16 %g, i16 %h, i16 %i, i16 %j, i16 %k, i16 %l, i16 %m, i16 %n, i16 %o, i16 %p) {
5; CHECK-LABEL: lower_trunc_16xi8:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    fmov s0, w0
8; CHECK-NEXT:    ldr h1, [sp]
9; CHECK-NEXT:    add x8, sp, #8
10; CHECK-NEXT:    ld1 { v1.h }[1], [x8]
11; CHECK-NEXT:    add x8, sp, #16
12; CHECK-NEXT:    mov v0.h[1], w1
13; CHECK-NEXT:    ld1 { v1.h }[2], [x8]
14; CHECK-NEXT:    add x8, sp, #24
15; CHECK-NEXT:    mov v0.h[2], w2
16; CHECK-NEXT:    ld1 { v1.h }[3], [x8]
17; CHECK-NEXT:    add x8, sp, #32
18; CHECK-NEXT:    mov v0.h[3], w3
19; CHECK-NEXT:    ld1 { v1.h }[4], [x8]
20; CHECK-NEXT:    add x8, sp, #40
21; CHECK-NEXT:    ld1 { v1.h }[5], [x8]
22; CHECK-NEXT:    add x8, sp, #48
23; CHECK-NEXT:    mov v0.h[4], w4
24; CHECK-NEXT:    ld1 { v1.h }[6], [x8]
25; CHECK-NEXT:    add x8, sp, #56
26; CHECK-NEXT:    mov v0.h[5], w5
27; CHECK-NEXT:    ld1 { v1.h }[7], [x8]
28; CHECK-NEXT:    mov v0.h[6], w6
29; CHECK-NEXT:    add v2.8h, v1.8h, v1.8h
30; CHECK-NEXT:    mov v0.h[7], w7
31; CHECK-NEXT:    add v3.8h, v0.8h, v0.8h
32; CHECK-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
33; CHECK-NEXT:    uzp1 v1.16b, v3.16b, v2.16b
34; CHECK-NEXT:    eor v0.16b, v0.16b, v1.16b
35; CHECK-NEXT:    ret
36  %a1 = insertelement <16 x i16> poison, i16 %a, i16 0
37  %b1 = insertelement <16 x i16> %a1, i16 %b, i16 1
38  %c1 = insertelement <16 x i16> %b1, i16 %c, i16 2
39  %d1 = insertelement <16 x i16> %c1, i16 %d, i16 3
40  %e1 = insertelement <16 x i16> %d1, i16 %e, i16 4
41  %f1 = insertelement <16 x i16> %e1, i16 %f, i16 5
42  %g1 = insertelement <16 x i16> %f1, i16 %g, i16 6
43  %h1 = insertelement <16 x i16> %g1, i16 %h, i16 7
44  %i1 = insertelement <16 x i16> %h1, i16 %i, i16 8
45  %j1 = insertelement <16 x i16> %i1, i16 %j, i16 9
46  %k1 = insertelement <16 x i16> %j1, i16 %k, i16 10
47  %l1 = insertelement <16 x i16> %k1, i16 %l, i16 11
48  %m1 = insertelement <16 x i16> %l1, i16 %m, i16 12
49  %n1 = insertelement <16 x i16> %m1, i16 %n, i16 13
50  %o1 = insertelement <16 x i16> %n1, i16 %o, i16 14
51  %p1 = insertelement <16 x i16> %o1, i16 %p, i16 15
52  %t = trunc <16 x i16> %p1 to <16 x i8>
53  %s = add <16 x i16> %p1, %p1
54  %t2 = trunc <16 x i16> %s to <16 x i8>
55  %pro = xor <16 x i8> %t, %t2
56  ret <16 x i8> %pro
57}
58
59define <8 x i16> @lower_trunc_8xi16(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) {
60; CHECK-LABEL: lower_trunc_8xi16:
61; CHECK:       // %bb.0:
62; CHECK-NEXT:    fmov s0, w4
63; CHECK-NEXT:    fmov s1, w0
64; CHECK-NEXT:    mov v0.s[1], w5
65; CHECK-NEXT:    mov v1.s[1], w1
66; CHECK-NEXT:    mov v0.s[2], w6
67; CHECK-NEXT:    mov v1.s[2], w2
68; CHECK-NEXT:    mov v0.s[3], w7
69; CHECK-NEXT:    mov v1.s[3], w3
70; CHECK-NEXT:    add v2.4s, v0.4s, v0.4s
71; CHECK-NEXT:    add v3.4s, v1.4s, v1.4s
72; CHECK-NEXT:    uzp1 v0.8h, v1.8h, v0.8h
73; CHECK-NEXT:    uzp1 v1.8h, v3.8h, v2.8h
74; CHECK-NEXT:    eor v0.16b, v0.16b, v1.16b
75; CHECK-NEXT:    ret
76  %a1 = insertelement <8 x i32> poison, i32 %a, i32 0
77  %b1 = insertelement <8 x i32> %a1, i32 %b, i32 1
78  %c1 = insertelement <8 x i32> %b1, i32 %c, i32 2
79  %d1 = insertelement <8 x i32> %c1, i32 %d, i32 3
80  %e1 = insertelement <8 x i32> %d1, i32 %e, i32 4
81  %f1 = insertelement <8 x i32> %e1, i32 %f, i32 5
82  %g1 = insertelement <8 x i32> %f1, i32 %g, i32 6
83  %h1 = insertelement <8 x i32> %g1, i32 %h, i32 7
84  %t = trunc <8 x i32> %h1 to <8 x i16>
85  %s = add <8 x i32> %h1, %h1
86  %t2 = trunc <8 x i32> %s to <8 x i16>
87  %o = xor <8 x i16> %t, %t2
88  ret <8 x i16> %o
89}
90
91define <4 x i32> @lower_trunc_4xi32(i64 %a, i64 %b, i64 %c, i64 %d) {
92; CHECK-LABEL: lower_trunc_4xi32:
93; CHECK:       // %bb.0:
94; CHECK-NEXT:    fmov d0, x2
95; CHECK-NEXT:    fmov d1, x0
96; CHECK-NEXT:    mov v0.d[1], x3
97; CHECK-NEXT:    mov v1.d[1], x1
98; CHECK-NEXT:    add v2.2d, v0.2d, v0.2d
99; CHECK-NEXT:    add v3.2d, v1.2d, v1.2d
100; CHECK-NEXT:    uzp1 v0.4s, v1.4s, v0.4s
101; CHECK-NEXT:    uzp1 v1.4s, v3.4s, v2.4s
102; CHECK-NEXT:    eor v0.16b, v0.16b, v1.16b
103; CHECK-NEXT:    ret
104  %a1 = insertelement <4 x i64> poison, i64 %a, i64 0
105  %b1 = insertelement <4 x i64> %a1, i64 %b, i64 1
106  %c1 = insertelement <4 x i64> %b1, i64 %c, i64 2
107  %d1 = insertelement <4 x i64> %c1, i64 %d, i64 3
108  %t = trunc <4 x i64> %d1 to <4 x i32>
109  %s = add <4 x i64> %d1, %d1
110  %t2 = trunc <4 x i64> %s to <4 x i32>
111  %o = xor <4 x i32> %t, %t2
112  ret <4 x i32> %o
113}
114
115define <8 x i32> @lower_trunc_8xi32(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h) {
116; CHECK-LABEL: lower_trunc_8xi32:
117; CHECK:       // %bb.0:
118; CHECK-NEXT:    fmov d0, x2
119; CHECK-NEXT:    fmov d1, x0
120; CHECK-NEXT:    fmov d2, x6
121; CHECK-NEXT:    fmov d3, x4
122; CHECK-NEXT:    mov v0.d[1], x3
123; CHECK-NEXT:    mov v1.d[1], x1
124; CHECK-NEXT:    mov v2.d[1], x7
125; CHECK-NEXT:    mov v3.d[1], x5
126; CHECK-NEXT:    add v4.2d, v0.2d, v0.2d
127; CHECK-NEXT:    add v5.2d, v1.2d, v1.2d
128; CHECK-NEXT:    add v6.2d, v2.2d, v2.2d
129; CHECK-NEXT:    add v7.2d, v3.2d, v3.2d
130; CHECK-NEXT:    uzp1 v2.4s, v3.4s, v2.4s
131; CHECK-NEXT:    uzp1 v0.4s, v1.4s, v0.4s
132; CHECK-NEXT:    uzp1 v3.4s, v5.4s, v4.4s
133; CHECK-NEXT:    uzp1 v1.4s, v7.4s, v6.4s
134; CHECK-NEXT:    eor v0.16b, v0.16b, v3.16b
135; CHECK-NEXT:    eor v1.16b, v2.16b, v1.16b
136; CHECK-NEXT:    ret
137  %a1 = insertelement <8 x i64> poison, i64 %a, i64 0
138  %b1 = insertelement <8 x i64> %a1, i64 %b, i64 1
139  %c1 = insertelement <8 x i64> %b1, i64 %c, i64 2
140  %d1 = insertelement <8 x i64> %c1, i64 %d, i64 3
141  %e1 = insertelement <8 x i64> %d1, i64 %e, i64 4
142  %f1 = insertelement <8 x i64> %e1, i64 %f, i64 5
143  %g1 = insertelement <8 x i64> %f1, i64 %g, i64 6
144  %h1 = insertelement <8 x i64> %g1, i64 %h, i64 7
145  %t = trunc <8 x i64> %h1 to <8 x i32>
146  %s = add <8 x i64> %h1, %h1
147  %t2 = trunc <8 x i64> %s to <8 x i32>
148  %o = xor <8 x i32> %t, %t2
149  ret <8 x i32> %o
150}
151