1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --force-update 2; RUN: llc -verify-machineinstrs -mtriple=aarch64-- -O1 -fast-isel=0 -global-isel=false %s -o - | FileCheck %s -check-prefix=NOLSE 3; RUN: llc -verify-machineinstrs -mtriple=aarch64-- -mattr=+lse -O1 -fast-isel=0 -global-isel=false %s -o - | FileCheck %s -check-prefix=LSE 4 5define half @test_rmw_xchg_f16(ptr %dst, half %new) { 6; NOLSE-LABEL: test_rmw_xchg_f16: 7; NOLSE: // %bb.0: 8; NOLSE-NEXT: // kill: def $h0 killed $h0 def $s0 9; NOLSE-NEXT: fmov w8, s0 10; NOLSE-NEXT: .LBB0_1: // %atomicrmw.start 11; NOLSE-NEXT: // =>This Inner Loop Header: Depth=1 12; NOLSE-NEXT: ldaxrh w9, [x0] 13; NOLSE-NEXT: stlxrh w10, w8, [x0] 14; NOLSE-NEXT: cbnz w10, .LBB0_1 15; NOLSE-NEXT: // %bb.2: // %atomicrmw.end 16; NOLSE-NEXT: fmov s0, w9 17; NOLSE-NEXT: // kill: def $h0 killed $h0 killed $s0 18; NOLSE-NEXT: ret 19; 20; LSE-LABEL: test_rmw_xchg_f16: 21; LSE: // %bb.0: 22; LSE-NEXT: // kill: def $h0 killed $h0 def $s0 23; LSE-NEXT: fmov w8, s0 24; LSE-NEXT: swpalh w8, w8, [x0] 25; LSE-NEXT: fmov s0, w8 26; LSE-NEXT: // kill: def $h0 killed $h0 killed $s0 27; LSE-NEXT: ret 28 %res = atomicrmw xchg ptr %dst, half %new seq_cst 29 ret half %res 30} 31 32define float @test_rmw_xchg_f32(ptr %dst, float %new) { 33; NOLSE-LABEL: test_rmw_xchg_f32: 34; NOLSE: // %bb.0: 35; NOLSE-NEXT: fmov w9, s0 36; NOLSE-NEXT: .LBB1_1: // %atomicrmw.start 37; NOLSE-NEXT: // =>This Inner Loop Header: Depth=1 38; NOLSE-NEXT: ldaxr w8, [x0] 39; NOLSE-NEXT: stlxr w10, w9, [x0] 40; NOLSE-NEXT: cbnz w10, .LBB1_1 41; NOLSE-NEXT: // %bb.2: // %atomicrmw.end 42; NOLSE-NEXT: fmov s0, w8 43; NOLSE-NEXT: ret 44; 45; LSE-LABEL: test_rmw_xchg_f32: 46; LSE: // %bb.0: 47; LSE-NEXT: fmov w8, s0 48; LSE-NEXT: swpal w8, w8, [x0] 49; LSE-NEXT: fmov s0, w8 50; LSE-NEXT: ret 51 %res = atomicrmw xchg ptr %dst, float %new seq_cst 52 ret float %res 53} 54 55define double @test_rmw_xchg_f64(ptr %dst, double %new) { 56; NOLSE-LABEL: test_rmw_xchg_f64: 57; NOLSE: // %bb.0: 58; NOLSE-NEXT: fmov x8, d0 59; NOLSE-NEXT: .LBB2_1: // %atomicrmw.start 60; NOLSE-NEXT: // =>This Inner Loop Header: Depth=1 61; NOLSE-NEXT: ldaxr x9, [x0] 62; NOLSE-NEXT: stlxr w10, x8, [x0] 63; NOLSE-NEXT: cbnz w10, .LBB2_1 64; NOLSE-NEXT: // %bb.2: // %atomicrmw.end 65; NOLSE-NEXT: fmov d0, x9 66; NOLSE-NEXT: ret 67; 68; LSE-LABEL: test_rmw_xchg_f64: 69; LSE: // %bb.0: 70; LSE-NEXT: fmov x8, d0 71; LSE-NEXT: swpal x8, x8, [x0] 72; LSE-NEXT: fmov d0, x8 73; LSE-NEXT: ret 74 %res = atomicrmw xchg ptr %dst, double %new seq_cst 75 ret double %res 76} 77 78define fp128 @test_rmw_xchg_f128(ptr %dst, fp128 %new) { 79; NOLSE-LABEL: test_rmw_xchg_f128: 80; NOLSE: // %bb.0: 81; NOLSE-NEXT: sub sp, sp, #32 82; NOLSE-NEXT: .cfi_def_cfa_offset 32 83; NOLSE-NEXT: str q0, [sp, #16] 84; NOLSE-NEXT: ldp x9, x8, [sp, #16] 85; NOLSE-NEXT: .LBB3_1: // %atomicrmw.start 86; NOLSE-NEXT: // =>This Inner Loop Header: Depth=1 87; NOLSE-NEXT: ldaxp x11, x10, [x0] 88; NOLSE-NEXT: stlxp w12, x9, x8, [x0] 89; NOLSE-NEXT: cbnz w12, .LBB3_1 90; NOLSE-NEXT: // %bb.2: // %atomicrmw.end 91; NOLSE-NEXT: stp x11, x10, [sp] 92; NOLSE-NEXT: ldr q0, [sp], #32 93; NOLSE-NEXT: ret 94; 95; LSE-LABEL: test_rmw_xchg_f128: 96; LSE: // %bb.0: 97; LSE-NEXT: sub sp, sp, #32 98; LSE-NEXT: .cfi_def_cfa_offset 32 99; LSE-NEXT: str q0, [sp, #16] 100; LSE-NEXT: ldp x2, x3, [sp, #16] 101; LSE-NEXT: ldp x4, x5, [x0] 102; LSE-NEXT: .LBB3_1: // %atomicrmw.start 103; LSE-NEXT: // =>This Inner Loop Header: Depth=1 104; LSE-NEXT: mov x7, x5 105; LSE-NEXT: mov x6, x4 106; LSE-NEXT: mov x5, x7 107; LSE-NEXT: mov x4, x6 108; LSE-NEXT: caspal x4, x5, x2, x3, [x0] 109; LSE-NEXT: cmp x5, x7 110; LSE-NEXT: ccmp x4, x6, #0, eq 111; LSE-NEXT: b.ne .LBB3_1 112; LSE-NEXT: // %bb.2: // %atomicrmw.end 113; LSE-NEXT: stp x4, x5, [sp] 114; LSE-NEXT: ldr q0, [sp], #32 115; LSE-NEXT: ret 116 %res = atomicrmw xchg ptr %dst, fp128 %new seq_cst 117 ret fp128 %res 118} 119