1; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs < %s | FileCheck %s 2; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -mattr=+outline-atomics < %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS 3 4define i32 @foo(ptr %var, i1 %cond) { 5; OUTLINE-ATOMICS: bl __aarch64_ldadd4_relax 6; CHECK-LABEL: foo: 7 br i1 %cond, label %atomic_ver, label %simple_ver 8simple_ver: 9 %oldval = load i32, ptr %var 10 %newval = add nsw i32 %oldval, -1 11 store i32 %newval, ptr %var 12 br label %somewhere 13atomic_ver: 14 fence seq_cst 15 %val = atomicrmw add ptr %var, i32 -1 monotonic 16 fence seq_cst 17 br label %somewhere 18; CHECK: dmb 19; CHECK: ldxr 20; CHECK: dmb 21 ; The key point here is that the second dmb isn't immediately followed by the 22 ; simple_ver basic block, which LLVM attempted to do when DMB had been marked 23 ; with isBarrier. For now, look for something that looks like "somewhere". 24; CHECK-NEXT: ret 25somewhere: 26 %combined = phi i32 [ %val, %atomic_ver ], [ %newval, %simple_ver] 27 ret i32 %combined 28} 29