xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64ec-reservedregs.ll (revision a6065f0fa55aaf694b5f85ecad7badec5cc02425)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=arm64ec-pc-windows-msvc -arm64ec-generate-thunks=false < %s | FileCheck %s
3
4; Make sure we're reserving all the registers that are supposed to be
5; reserved. Integer regs x13, x15, x23, x24, x28. Float regs v16-v31.
6; We confirm this by ensuring that we spill if and only if none of the
7; unreserved registers are available.
8
9define i32 @no_int_regs(i32 %x) nounwind {
10; CHECK-LABEL: no_int_regs:
11; CHECK:       // %bb.0: // %entry
12; CHECK-NEXT:    stp x30, x29, [sp, #-80]! // 16-byte Folded Spill
13; CHECK-NEXT:    str x27, [sp, #16] // 8-byte Folded Spill
14; CHECK-NEXT:    stp x26, x25, [sp, #32] // 16-byte Folded Spill
15; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
16; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
17; CHECK-NEXT:    str w0, [sp, #28] // 4-byte Folded Spill
18; CHECK-NEXT:    //APP
19; CHECK-NEXT:    //NO_APP
20; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
21; CHECK-NEXT:    ldr w0, [sp, #28] // 4-byte Folded Reload
22; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
23; CHECK-NEXT:    ldr x27, [sp, #16] // 8-byte Folded Reload
24; CHECK-NEXT:    ldp x26, x25, [sp, #32] // 16-byte Folded Reload
25; CHECK-NEXT:    ldp x30, x29, [sp], #80 // 16-byte Folded Reload
26; CHECK-NEXT:    ret
27entry:
28  tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x15},~{x16},~{x17},~{x19},~{x20},~{x21},~{x22},~{x25},~{x26},~{x27},~{fp},~{lr}"()
29  ret i32 %x
30}
31
32define i32 @one_int_reg(i32 %x) nounwind {
33; CHECK-LABEL: one_int_reg:
34; CHECK:       // %bb.0: // %entry
35; CHECK-NEXT:    stp x30, x29, [sp, #-80]! // 16-byte Folded Spill
36; CHECK-NEXT:    str x27, [sp, #16] // 8-byte Folded Spill
37; CHECK-NEXT:    mov w30, w0
38; CHECK-NEXT:    stp x26, x25, [sp, #32] // 16-byte Folded Spill
39; CHECK-NEXT:    stp x22, x21, [sp, #48] // 16-byte Folded Spill
40; CHECK-NEXT:    stp x20, x19, [sp, #64] // 16-byte Folded Spill
41; CHECK-NEXT:    //APP
42; CHECK-NEXT:    //NO_APP
43; CHECK-NEXT:    ldp x20, x19, [sp, #64] // 16-byte Folded Reload
44; CHECK-NEXT:    ldr x27, [sp, #16] // 8-byte Folded Reload
45; CHECK-NEXT:    ldp x22, x21, [sp, #48] // 16-byte Folded Reload
46; CHECK-NEXT:    mov w0, w30
47; CHECK-NEXT:    ldp x26, x25, [sp, #32] // 16-byte Folded Reload
48; CHECK-NEXT:    ldp x30, x29, [sp], #80 // 16-byte Folded Reload
49; CHECK-NEXT:    ret
50entry:
51  tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x15},~{x16},~{x17},~{x19},~{x20},~{x21},~{x22},~{x25},~{x26},~{x27},~{fp}"()
52  ret i32 %x
53}
54
55define float @no_float_regs(float %x) nounwind {
56; CHECK-LABEL: no_float_regs:
57; CHECK:       // %bb.0: // %entry
58; CHECK-NEXT:    sub sp, sp, #80
59; CHECK-NEXT:    stp d15, d14, [sp, #16] // 16-byte Folded Spill
60; CHECK-NEXT:    stp d13, d12, [sp, #32] // 16-byte Folded Spill
61; CHECK-NEXT:    stp d11, d10, [sp, #48] // 16-byte Folded Spill
62; CHECK-NEXT:    stp d9, d8, [sp, #64] // 16-byte Folded Spill
63; CHECK-NEXT:    str s0, [sp, #12] // 4-byte Folded Spill
64; CHECK-NEXT:    //APP
65; CHECK-NEXT:    //NO_APP
66; CHECK-NEXT:    ldp d9, d8, [sp, #64] // 16-byte Folded Reload
67; CHECK-NEXT:    ldr s0, [sp, #12] // 4-byte Folded Reload
68; CHECK-NEXT:    ldp d11, d10, [sp, #48] // 16-byte Folded Reload
69; CHECK-NEXT:    ldp d13, d12, [sp, #32] // 16-byte Folded Reload
70; CHECK-NEXT:    ldp d15, d14, [sp, #16] // 16-byte Folded Reload
71; CHECK-NEXT:    add sp, sp, #80
72; CHECK-NEXT:    ret
73entry:
74  tail call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15}"()
75  ret float %x
76}
77
78define float @one_float_reg(float %x) nounwind {
79; CHECK-LABEL: one_float_reg:
80; CHECK:       // %bb.0: // %entry
81; CHECK-NEXT:    stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
82; CHECK-NEXT:    fmov s15, s0
83; CHECK-NEXT:    stp d13, d12, [sp, #16] // 16-byte Folded Spill
84; CHECK-NEXT:    stp d11, d10, [sp, #32] // 16-byte Folded Spill
85; CHECK-NEXT:    stp d9, d8, [sp, #48] // 16-byte Folded Spill
86; CHECK-NEXT:    //APP
87; CHECK-NEXT:    //NO_APP
88; CHECK-NEXT:    ldp d9, d8, [sp, #48] // 16-byte Folded Reload
89; CHECK-NEXT:    ldp d11, d10, [sp, #32] // 16-byte Folded Reload
90; CHECK-NEXT:    fmov s0, s15
91; CHECK-NEXT:    ldp d13, d12, [sp, #16] // 16-byte Folded Reload
92; CHECK-NEXT:    ldp d15, d14, [sp], #64 // 16-byte Folded Reload
93; CHECK-NEXT:    ret
94entry:
95  tail call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14}"()
96  ret float %x
97}
98
99