xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-zextload-unscaled.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb)
1; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
2
3@var32 = global i32 0
4
5define void @test_zextloadi1_unscaled(ptr %base) {
6; CHECK-LABEL: test_zextloadi1_unscaled:
7; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
8
9  %addr = getelementptr i1, ptr %base, i32 -7
10  %val = load i1, ptr %addr, align 1
11
12  %extended = zext i1 %val to i32
13  store i32 %extended, ptr @var32, align 4
14  ret void
15}
16
17define void @test_zextloadi8_unscaled(ptr %base) {
18; CHECK-LABEL: test_zextloadi8_unscaled:
19; CHECK: ldurb {{w[0-9]+}}, [{{x[0-9]+}}, #-7]
20
21  %addr = getelementptr i8, ptr %base, i32 -7
22  %val = load i8, ptr %addr, align 1
23
24  %extended = zext i8 %val to i32
25  store i32 %extended, ptr @var32, align 4
26  ret void
27}
28
29define void @test_zextloadi16_unscaled(ptr %base) {
30; CHECK-LABEL: test_zextloadi16_unscaled:
31; CHECK: ldurh {{w[0-9]+}}, [{{x[0-9]+}}, #-14]
32
33  %addr = getelementptr i16, ptr %base, i32 -7
34  %val = load i16, ptr %addr, align 2
35
36  %extended = zext i16 %val to i32
37  store i32 %extended, ptr @var32, align 4
38  ret void
39}
40
41