1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s 3; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -global-isel | FileCheck %s 4 5define <2 x float> @f1(<2 x float> %a, <2 x float> %b) nounwind readnone ssp { 6; CHECK-LABEL: f1: 7; CHECK: // %bb.0: 8; CHECK-NEXT: fmaxnm.2s v0, v0, v1 9; CHECK-NEXT: ret 10 %vmaxnm2.i = tail call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind 11 ret <2 x float> %vmaxnm2.i 12} 13 14define <4 x float> @f2(<4 x float> %a, <4 x float> %b) nounwind readnone ssp { 15; CHECK-LABEL: f2: 16; CHECK: // %bb.0: 17; CHECK-NEXT: fmaxnm.4s v0, v0, v1 18; CHECK-NEXT: ret 19 %vmaxnm2.i = tail call <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind 20 ret <4 x float> %vmaxnm2.i 21} 22 23define <2 x double> @f3(<2 x double> %a, <2 x double> %b) nounwind readnone ssp { 24; CHECK-LABEL: f3: 25; CHECK: // %bb.0: 26; CHECK-NEXT: fmaxnm.2d v0, v0, v1 27; CHECK-NEXT: ret 28 %vmaxnm2.i = tail call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind 29 ret <2 x double> %vmaxnm2.i 30} 31 32define <2 x float> @f4(<2 x float> %a, <2 x float> %b) nounwind readnone ssp { 33; CHECK-LABEL: f4: 34; CHECK: // %bb.0: 35; CHECK-NEXT: fminnm.2s v0, v0, v1 36; CHECK-NEXT: ret 37 %vminnm2.i = tail call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind 38 ret <2 x float> %vminnm2.i 39} 40 41define <4 x float> @f5(<4 x float> %a, <4 x float> %b) nounwind readnone ssp { 42; CHECK-LABEL: f5: 43; CHECK: // %bb.0: 44; CHECK-NEXT: fminnm.4s v0, v0, v1 45; CHECK-NEXT: ret 46 %vminnm2.i = tail call <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind 47 ret <4 x float> %vminnm2.i 48} 49 50define <2 x double> @f6(<2 x double> %a, <2 x double> %b) nounwind readnone ssp { 51; CHECK-LABEL: f6: 52; CHECK: // %bb.0: 53; CHECK-NEXT: fminnm.2d v0, v0, v1 54; CHECK-NEXT: ret 55 %vminnm2.i = tail call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind 56 ret <2 x double> %vminnm2.i 57} 58 59define float @f7(float %a, float %b) nounwind readnone ssp { 60; CHECK-LABEL: f7: 61; CHECK: // %bb.0: 62; CHECK-NEXT: fmaxnm s0, s0, s1 63; CHECK-NEXT: ret 64 %vmaxnm2.i = tail call float @llvm.aarch64.neon.fmaxnm.f32(float %a, float %b) nounwind 65 ret float %vmaxnm2.i 66} 67 68define double @f8(double %a, double %b) nounwind readnone ssp { 69; CHECK-LABEL: f8: 70; CHECK: // %bb.0: 71; CHECK-NEXT: fminnm d0, d0, d1 72; CHECK-NEXT: ret 73 %vmaxnm2.i = tail call double @llvm.aarch64.neon.fminnm.f64(double %a, double %b) nounwind 74 ret double %vmaxnm2.i 75} 76 77declare <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 78declare <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 79declare <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 80declare <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 81declare <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 82declare <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 83declare float @llvm.aarch64.neon.fmaxnm.f32(float, float) nounwind readnone 84declare double @llvm.aarch64.neon.fminnm.f64(double, double) nounwind readnone 85 86define double @test_fmaxnmv(<2 x double> %in) { 87; CHECK-LABEL: test_fmaxnmv: 88; CHECK: // %bb.0: 89; CHECK-NEXT: fmaxnmp.2d d0, v0 90; CHECK-NEXT: ret 91 %max = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 92 ret double %max 93} 94 95define double @test_fminnmv(<2 x double> %in) { 96; CHECK-LABEL: test_fminnmv: 97; CHECK: // %bb.0: 98; CHECK-NEXT: fminnmp.2d d0, v0 99; CHECK-NEXT: ret 100 %min = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in) 101 ret double %min 102} 103 104declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>) 105declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>) 106