xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-unaligned_ldst.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
2; rdar://r11231896
3
4define void @t1(ptr nocapture %a, ptr nocapture %b) nounwind {
5entry:
6; CHECK-LABEL: t1:
7; CHECK-NOT: orr
8; CHECK: ldr [[X0:x[0-9]+]], [x1]
9; CHECK: str [[X0]], [x0]
10  %tmp3 = load i64, ptr %b, align 1
11  store i64 %tmp3, ptr %a, align 1
12  ret void
13}
14
15define void @t2(ptr nocapture %a, ptr nocapture %b) nounwind {
16entry:
17; CHECK-LABEL: t2:
18; CHECK-NOT: orr
19; CHECK: ldr [[W0:w[0-9]+]], [x1]
20; CHECK: str [[W0]], [x0]
21  %tmp3 = load i32, ptr %b, align 1
22  store i32 %tmp3, ptr %a, align 1
23  ret void
24}
25
26define void @t3(ptr nocapture %a, ptr nocapture %b) nounwind {
27entry:
28; CHECK-LABEL: t3:
29; CHECK-NOT: orr
30; CHECK: ldrh [[W0:w[0-9]+]], [x1]
31; CHECK: strh [[W0]], [x0]
32  %tmp3 = load i16, ptr %b, align 1
33  store i16 %tmp3, ptr %a, align 1
34  ret void
35}
36