xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-trunc-store.ll (revision e4d0e1209934ee8885fb4c3f046f9aa29c660d55)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=arm64-none-eabi | FileCheck %s
3
4define void @bar(<8 x i16> %arg, ptr %p) nounwind {
5; CHECK-LABEL: bar:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    xtn v0.8b, v0.8h
8; CHECK-NEXT:    str d0, [x0]
9; CHECK-NEXT:    ret
10  %tmp = trunc <8 x i16> %arg to <8 x i8>
11  store <8 x i8> %tmp, ptr %p, align 8
12  ret void
13}
14
15@zptr8 = common global ptr null, align 8
16@zptr16 = common global ptr null, align 8
17@zptr32 = common global ptr null, align 8
18
19define void @fct32(i32 %arg, i64 %var) {
20; CHECK-LABEL: fct32:
21; CHECK:       // %bb.0: // %bb
22; CHECK-NEXT:    adrp x8, :got:zptr32
23; CHECK-NEXT:    ldr x8, [x8, :got_lo12:zptr32]
24; CHECK-NEXT:    ldr x8, [x8]
25; CHECK-NEXT:    add x8, x8, w0, sxtw #2
26; CHECK-NEXT:    stur w1, [x8, #-4]
27; CHECK-NEXT:    ret
28bb:
29  %.pre37 = load ptr, ptr @zptr32, align 8
30  %dec = add nsw i32 %arg, -1
31  %idxprom8 = sext i32 %dec to i64
32  %arrayidx9 = getelementptr inbounds i32, ptr %.pre37, i64 %idxprom8
33  %tmp = trunc i64 %var to i32
34  store i32 %tmp, ptr %arrayidx9, align 4
35  ret void
36}
37
38define void @fct16(i32 %arg, i64 %var) {
39; CHECK-LABEL: fct16:
40; CHECK:       // %bb.0: // %bb
41; CHECK-NEXT:    adrp x8, :got:zptr16
42; CHECK-NEXT:    ldr x8, [x8, :got_lo12:zptr16]
43; CHECK-NEXT:    ldr x8, [x8]
44; CHECK-NEXT:    add x8, x8, w0, sxtw #1
45; CHECK-NEXT:    sturh w1, [x8, #-2]
46; CHECK-NEXT:    ret
47bb:
48  %.pre37 = load ptr, ptr @zptr16, align 8
49  %dec = add nsw i32 %arg, -1
50  %idxprom8 = sext i32 %dec to i64
51  %arrayidx9 = getelementptr inbounds i16, ptr %.pre37, i64 %idxprom8
52  %tmp = trunc i64 %var to i16
53  store i16 %tmp, ptr %arrayidx9, align 4
54  ret void
55}
56
57define void @fct8(i32 %arg, i64 %var) {
58; CHECK-LABEL: fct8:
59; CHECK:       // %bb.0: // %bb
60; CHECK-NEXT:    adrp x8, :got:zptr8
61; CHECK-NEXT:    ldr x8, [x8, :got_lo12:zptr8]
62; CHECK-NEXT:    ldr x8, [x8]
63; CHECK-NEXT:    add x8, x8, w0, sxtw
64; CHECK-NEXT:    sturb w1, [x8, #-1]
65; CHECK-NEXT:    ret
66bb:
67  %.pre37 = load ptr, ptr @zptr8, align 8
68  %dec = add nsw i32 %arg, -1
69  %idxprom8 = sext i32 %dec to i64
70  %arrayidx9 = getelementptr inbounds i8, ptr %.pre37, i64 %idxprom8
71  %tmp = trunc i64 %var to i8
72  store i8 %tmp, ptr %arrayidx9, align 4
73  ret void
74}
75