xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-setcc-int-to-fp-combine.ll (revision db158c7c830807caeeb0691739c41f1d522029e9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=arm64-apple-ios | FileCheck %s
3
4define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {
5; CHECK-LABEL: foo:
6; CHECK:       ; %bb.0:
7; CHECK-NEXT:    fmov.4s v2, #1.00000000
8; CHECK-NEXT:    fcmeq.4s v0, v0, v1
9; CHECK-NEXT:    and.16b v0, v0, v2
10; CHECK-NEXT:    ret
11  %cmp = fcmp oeq <4 x float> %val, %test
12  %ext = zext <4 x i1> %cmp to <4 x i32>
13  %result = sitofp <4 x i32> %ext to <4 x float>
14  ret <4 x float> %result
15}
16; Make sure the operation doesn't try to get folded when the sizes don't match,
17; as that ends up crashing later when trying to form a bitcast operation for
18; the folded nodes.
19define void @foo1(<4 x float> %val, <4 x float> %test, ptr %p) nounwind {
20; CHECK-LABEL: foo1:
21; CHECK:       ; %bb.0:
22; CHECK-NEXT:    movi.4s v2, #1
23; CHECK-NEXT:    fcmeq.4s v0, v0, v1
24; CHECK-NEXT:    and.16b v0, v0, v2
25; CHECK-NEXT:    ushll2.2d v1, v0, #0
26; CHECK-NEXT:    ushll.2d v0, v0, #0
27; CHECK-NEXT:    scvtf.2d v1, v1
28; CHECK-NEXT:    scvtf.2d v0, v0
29; CHECK-NEXT:    stp q0, q1, [x0]
30; CHECK-NEXT:    ret
31  %cmp = fcmp oeq <4 x float> %val, %test
32  %ext = zext <4 x i1> %cmp to <4 x i32>
33  %result = sitofp <4 x i32> %ext to <4 x double>
34  store <4 x double> %result, ptr %p
35  ret void
36}
37
38; Fold explicit AND operations when the constant isn't a splat of a single
39; scalar value like what the zext creates.
40define <4 x float> @foo2(<4 x float> %val, <4 x float> %test) nounwind {
41; CHECK-LABEL: foo2:
42; CHECK:       ; %bb.0:
43; CHECK-NEXT:    fcmeq.4s v0, v0, v1
44; CHECK-NEXT:  Lloh0:
45; CHECK-NEXT:    adrp x8, lCPI2_0@PAGE
46; CHECK-NEXT:  Lloh1:
47; CHECK-NEXT:    ldr q1, [x8, lCPI2_0@PAGEOFF]
48; CHECK-NEXT:    and.16b v0, v0, v1
49; CHECK-NEXT:    ret
50; CHECK-NEXT:    .loh AdrpLdr Lloh0, Lloh1
51  %cmp = fcmp oeq <4 x float> %val, %test
52  %ext = zext <4 x i1> %cmp to <4 x i32>
53  %and = and <4 x i32> %ext, <i32 255, i32 256, i32 257, i32 258>
54  %result = sitofp <4 x i32> %and to <4 x float>
55  ret <4 x float> %result
56}
57