xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-memcpy-inline.ll (revision de0707a2b98162ab52fa2dd9277a9bbb4f7256c7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=arm64-eabi -mcpu=cyclone | FileCheck %s
3
4%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
5
6@src = external dso_local global %struct.x
7@dst = external dso_local global %struct.x
8
9@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
10@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
11@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
12@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR  \00", align 1
13@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
14@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
15@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
16
17define i32 @t0() {
18; CHECK-LABEL: t0:
19; CHECK:       // %bb.0: // %entry
20; CHECK-NEXT:    adrp x8, src
21; CHECK-NEXT:    add x8, x8, :lo12:src
22; CHECK-NEXT:    ldr x9, [x8]
23; CHECK-NEXT:    adrp x10, dst
24; CHECK-NEXT:    add x10, x10, :lo12:dst
25; CHECK-NEXT:    str x9, [x10]
26; CHECK-NEXT:    ldur w8, [x8, #7]
27; CHECK-NEXT:    stur w8, [x10, #7]
28; CHECK-NEXT:    mov w0, #0 // =0x0
29; CHECK-NEXT:    ret
30entry:
31  call void @llvm.memcpy.p0.p0.i32(ptr align 8 @dst, ptr align 8 @src, i32 11, i1 false)
32  ret i32 0
33}
34
35define void @t1(ptr nocapture %C) nounwind {
36; CHECK-LABEL: t1:
37; CHECK:       // %bb.0: // %entry
38; CHECK-NEXT:    adrp x8, .L.str1
39; CHECK-NEXT:    add x8, x8, :lo12:.L.str1
40; CHECK-NEXT:    ldr q0, [x8]
41; CHECK-NEXT:    str q0, [x0]
42; CHECK-NEXT:    ldur q0, [x8, #15]
43; CHECK-NEXT:    stur q0, [x0, #15]
44; CHECK-NEXT:    ret
45entry:
46  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str1, i64 31, i1 false)
47  ret void
48}
49
50define void @t2(ptr nocapture %C) nounwind {
51; CHECK-LABEL: t2:
52; CHECK:       // %bb.0: // %entry
53; CHECK-NEXT:    mov w8, #16716 // =0x414c
54; CHECK-NEXT:    movk w8, #72, lsl #16
55; CHECK-NEXT:    str w8, [x0, #32]
56; CHECK-NEXT:    adrp x8, .L.str2
57; CHECK-NEXT:    add x8, x8, :lo12:.L.str2
58; CHECK-NEXT:    ldp q0, q1, [x8]
59; CHECK-NEXT:    stp q0, q1, [x0]
60; CHECK-NEXT:    ret
61entry:
62  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str2, i64 36, i1 false)
63  ret void
64}
65
66define void @t3(ptr nocapture %C) nounwind {
67; CHECK-LABEL: t3:
68; CHECK:       // %bb.0: // %entry
69; CHECK-NEXT:    adrp x8, .L.str3
70; CHECK-NEXT:    add x8, x8, :lo12:.L.str3
71; CHECK-NEXT:    ldr q0, [x8]
72; CHECK-NEXT:    str q0, [x0]
73; CHECK-NEXT:    ldr x8, [x8, #16]
74; CHECK-NEXT:    str x8, [x0, #16]
75; CHECK-NEXT:    ret
76entry:
77  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str3, i64 24, i1 false)
78  ret void
79}
80
81define void @t4(ptr nocapture %C) nounwind {
82; CHECK-LABEL: t4:
83; CHECK:       // %bb.0: // %entry
84; CHECK-NEXT:    mov w8, #32 // =0x20
85; CHECK-NEXT:    strh w8, [x0, #16]
86; CHECK-NEXT:    adrp x8, .L.str4
87; CHECK-NEXT:    add x8, x8, :lo12:.L.str4
88; CHECK-NEXT:    ldr q0, [x8]
89; CHECK-NEXT:    str q0, [x0]
90; CHECK-NEXT:    ret
91entry:
92  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str4, i64 18, i1 false)
93  ret void
94}
95
96define void @t5(ptr nocapture %C) nounwind {
97; CHECK-LABEL: t5:
98; CHECK:       // %bb.0: // %entry
99; CHECK-NEXT:    mov w8, #21337 // =0x5359
100; CHECK-NEXT:    movk w8, #84, lsl #16
101; CHECK-NEXT:    stur w8, [x0, #3]
102; CHECK-NEXT:    mov w8, #18500 // =0x4844
103; CHECK-NEXT:    movk w8, #22866, lsl #16
104; CHECK-NEXT:    str w8, [x0]
105; CHECK-NEXT:    ret
106entry:
107  tail call void @llvm.memcpy.p0.p0.i64(ptr %C, ptr @.str5, i64 7, i1 false)
108  ret void
109}
110
111define void @t6() nounwind {
112; CHECK-LABEL: t6:
113; CHECK:       // %bb.0: // %entry
114; CHECK-NEXT:    adrp x8, .L.str6
115; CHECK-NEXT:    add x8, x8, :lo12:.L.str6
116; CHECK-NEXT:    ldr x9, [x8]
117; CHECK-NEXT:    adrp x10, spool.splbuf
118; CHECK-NEXT:    add x10, x10, :lo12:spool.splbuf
119; CHECK-NEXT:    str x9, [x10]
120; CHECK-NEXT:    ldur x8, [x8, #6]
121; CHECK-NEXT:    stur x8, [x10, #6]
122; CHECK-NEXT:    ret
123entry:
124  call void @llvm.memcpy.p0.p0.i64(ptr @spool.splbuf, ptr @.str6, i64 14, i1 false)
125  ret void
126}
127
128%struct.Foo = type { i32, i32, i32, i32 }
129
130define void @t7(ptr nocapture %a, ptr nocapture %b) nounwind {
131; CHECK-LABEL: t7:
132; CHECK:       // %bb.0: // %entry
133; CHECK-NEXT:    ldr q0, [x1]
134; CHECK-NEXT:    str q0, [x0]
135; CHECK-NEXT:    ret
136entry:
137  tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %a, ptr align 4 %b, i32 16, i1 false)
138  ret void
139}
140
141declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind
142declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
143