xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-fminv.ll (revision 7da1dda01eff708decbbb0b4cd52b2b95d89ea2a) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s
3; RUN: llc < %s -mtriple=arm64-linux-gnu -global-isel | FileCheck %s
4
5define float @test_fminv_v2f32(<2 x float> %in) {
6; CHECK-LABEL: test_fminv_v2f32:
7; CHECK:       // %bb.0:
8; CHECK-NEXT:    fminp s0, v0.2s
9; CHECK-NEXT:    ret
10  %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
11  ret float %min
12}
13
14define float @test_fminv_v4f32(<4 x float> %in) {
15; CHECK-LABEL: test_fminv_v4f32:
16; CHECK:       // %bb.0:
17; CHECK-NEXT:    fminv s0, v0.4s
18; CHECK-NEXT:    ret
19  %min = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %in)
20  ret float %min
21}
22
23define double @test_fminv_v2f64(<2 x double> %in) {
24; CHECK-LABEL: test_fminv_v2f64:
25; CHECK:       // %bb.0:
26; CHECK-NEXT:    fminp d0, v0.2d
27; CHECK-NEXT:    ret
28  %min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in)
29  ret double %min
30}
31
32declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
33declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>)
34declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>)
35
36define float @test_fmaxv_v2f32(<2 x float> %in) {
37; CHECK-LABEL: test_fmaxv_v2f32:
38; CHECK:       // %bb.0:
39; CHECK-NEXT:    fmaxp s0, v0.2s
40; CHECK-NEXT:    ret
41  %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
42  ret float %max
43}
44
45define float @test_fmaxv_v4f32(<4 x float> %in) {
46; CHECK-LABEL: test_fmaxv_v4f32:
47; CHECK:       // %bb.0:
48; CHECK-NEXT:    fmaxv s0, v0.4s
49; CHECK-NEXT:    ret
50  %max = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %in)
51  ret float %max
52}
53
54define double @test_fmaxv_v2f64(<2 x double> %in) {
55; CHECK-LABEL: test_fmaxv_v2f64:
56; CHECK:       // %bb.0:
57; CHECK-NEXT:    fmaxp d0, v0.2d
58; CHECK-NEXT:    ret
59  %max = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> %in)
60  ret double %max
61}
62
63declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>)
64declare float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float>)
65declare double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double>)
66
67define float @test_fminnmv_v2f32(<2 x float> %in) {
68; CHECK-LABEL: test_fminnmv_v2f32:
69; CHECK:       // %bb.0:
70; CHECK-NEXT:    fminnmp s0, v0.2s
71; CHECK-NEXT:    ret
72  %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in)
73  ret float %minnm
74}
75
76define float @test_fminnmv_v4f32(<4 x float> %in) {
77; CHECK-LABEL: test_fminnmv_v4f32:
78; CHECK:       // %bb.0:
79; CHECK-NEXT:    fminnmv s0, v0.4s
80; CHECK-NEXT:    ret
81  %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %in)
82  ret float %minnm
83}
84
85define double @test_fminnmv_v2f64(<2 x double> %in) {
86; CHECK-LABEL: test_fminnmv_v2f64:
87; CHECK:       // %bb.0:
88; CHECK-NEXT:    fminnmp d0, v0.2d
89; CHECK-NEXT:    ret
90  %minnm = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in)
91  ret double %minnm
92}
93
94declare float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float>)
95declare float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float>)
96declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>)
97
98define float @test_fmaxnmv_v2f32(<2 x float> %in) {
99; CHECK-LABEL: test_fmaxnmv_v2f32:
100; CHECK:       // %bb.0:
101; CHECK-NEXT:    fmaxnmp s0, v0.2s
102; CHECK-NEXT:    ret
103  %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in)
104  ret float %maxnm
105}
106
107define float @test_fmaxnmv_v4f32(<4 x float> %in) {
108; CHECK-LABEL: test_fmaxnmv_v4f32:
109; CHECK:       // %bb.0:
110; CHECK-NEXT:    fmaxnmv s0, v0.4s
111; CHECK-NEXT:    ret
112  %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %in)
113  ret float %maxnm
114}
115
116define double @test_fmaxnmv_v2f64(<2 x double> %in) {
117; CHECK-LABEL: test_fmaxnmv_v2f64:
118; CHECK:       // %bb.0:
119; CHECK-NEXT:    fmaxnmp d0, v0.2d
120; CHECK-NEXT:    ret
121  %maxnm = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in)
122  ret double %maxnm
123}
124
125declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>)
126declare float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float>)
127declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
128