1; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64 2 3@message = global [80 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 16 4@temp = common global [80 x i8] zeroinitializer, align 16 5 6define void @t1() { 7; ARM64-LABEL: t1 8; ARM64: adrp x8, _message@PAGE 9; ARM64: add x0, x8, _message@PAGEOFF 10; ARM64: mov [[REG:w[0-9]+]], wzr 11; ARM64: mov x2, #80 12; ARM64: uxtb w1, [[REG]] 13; ARM64: bl _memset 14 call void @llvm.memset.p0.i64(ptr align 16 @message, i8 0, i64 80, i1 false) 15 ret void 16} 17 18declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) 19 20define void @t2() { 21; ARM64-LABEL: t2 22; ARM64: adrp x8, _temp@GOTPAGE 23; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF] 24; ARM64: adrp x8, _message@PAGE 25; ARM64: add x1, x8, _message@PAGEOFF 26; ARM64: mov x2, #80 27; ARM64: bl _memcpy 28 call void @llvm.memcpy.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 80, i1 false) 29 ret void 30} 31 32declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) 33 34define void @t3() { 35; ARM64-LABEL: t3 36; ARM64: adrp x8, _temp@GOTPAGE 37; ARM64: ldr x0, [x8, _temp@GOTPAGEOFF] 38; ARM64: adrp x8, _message@PAGE 39; ARM64: add x1, x8, _message@PAGEOFF 40; ARM64: mov x2, #20 41; ARM64: bl _memmove 42 call void @llvm.memmove.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 20, i1 false) 43 ret void 44} 45 46declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) 47 48define void @t4() { 49; ARM64-LABEL: t4 50; ARM64: adrp x8, _temp@GOTPAGE 51; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF] 52; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 53; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF 54; ARM64: ldr x10, [[[REG2]]] 55; ARM64: str x10, [[[REG0]]] 56; ARM64: ldr x10, [[[REG2]], #8] 57; ARM64: str x10, [[[REG0]], #8] 58; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #16] 59; ARM64: strb [[REG3]], [[[REG0]], #16] 60; ARM64: ret 61 call void @llvm.memcpy.p0.p0.i64(ptr align 16 @temp, ptr align 16 @message, i64 17, i1 false) 62 ret void 63} 64 65define void @t5() { 66; ARM64-LABEL: t5 67; ARM64: adrp x8, _temp@GOTPAGE 68; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF] 69; ARM64: adrp [[REG3:x[0-9]+]], _message@PAGE 70; ARM64: add [[REG1:x[0-9]+]], [[REG3]], _message@PAGEOFF 71; ARM64: ldr x10, [[[REG1]]] 72; ARM64: str x10, [[[REG0]]] 73; ARM64: ldr x10, [[[REG1]], #8] 74; ARM64: str x10, [[[REG0]], #8] 75; ARM64: ldrb [[REG4:w[0-9]+]], [[[REG1]], #16] 76; ARM64: strb [[REG4]], [[[REG0]], #16] 77; ARM64: ret 78 call void @llvm.memcpy.p0.p0.i64(ptr align 8 @temp, ptr align 8 @message, i64 17, i1 false) 79 ret void 80} 81 82define void @t6() { 83; ARM64-LABEL: t6 84; ARM64: adrp x8, _temp@GOTPAGE 85; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF] 86; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 87; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF 88; ARM64: ldr w10, [[[REG2]]] 89; ARM64: str w10, [[[REG0]]] 90; ARM64: ldr w10, [[[REG2]], #4] 91; ARM64: str w10, [[[REG0]], #4] 92; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #8] 93; ARM64: strb [[REG3]], [[[REG0]], #8] 94; ARM64: ret 95 call void @llvm.memcpy.p0.p0.i64(ptr align 4 @temp, ptr align 4 @message, i64 9, i1 false) 96 ret void 97} 98 99define void @t7() { 100; ARM64-LABEL: t7 101; ARM64: adrp x8, _temp@GOTPAGE 102; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF] 103; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 104; ARM64: add [[REG2:x[0-9]+]], [[REG1]], _message@PAGEOFF 105; ARM64: ldrh w10, [[[REG2]]] 106; ARM64: strh w10, [[[REG0]]] 107; ARM64: ldrh w10, [[[REG2]], #2] 108; ARM64: strh w10, [[[REG0]], #2] 109; ARM64: ldrh w10, [[[REG2]], #4] 110; ARM64: strh w10, [[[REG0]], #4] 111; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #6] 112; ARM64: strb [[REG3]], [[[REG0]], #6] 113; ARM64: ret 114 call void @llvm.memcpy.p0.p0.i64(ptr align 2 @temp, ptr align 2 @message, i64 7, i1 false) 115 ret void 116} 117 118define void @t8() { 119; ARM64-LABEL: t8 120; ARM64: adrp x8, _temp@GOTPAGE 121; ARM64: ldr [[REG0:x[0-9]+]], [x8, _temp@GOTPAGEOFF] 122; ARM64: adrp [[REG1:x[0-9]+]], _message@PAGE 123; ARM64: add [[REG2:x[0-9]+]], [[REG1:x[0-9]+]], _message@PAGEOFF 124; ARM64: ldrb w10, [[[REG2]]] 125; ARM64: strb w10, [[[REG0]]] 126; ARM64: ldrb w10, [[[REG2]], #1] 127; ARM64: strb w10, [[[REG0]], #1] 128; ARM64: ldrb w10, [[[REG2]], #2] 129; ARM64: strb w10, [[[REG0]], #2] 130; ARM64: ldrb [[REG3:w[0-9]+]], [[[REG2]], #3] 131; ARM64: strb [[REG3]], [[[REG0]], #3] 132; ARM64: ret 133 call void @llvm.memcpy.p0.p0.i64(ptr align 1 @temp, ptr align 1 @message, i64 4, i1 false) 134 ret void 135} 136 137define void @test_distant_memcpy(ptr %dst) { 138; ARM64-LABEL: test_distant_memcpy: 139; ARM64: mov [[ARRAY:x[0-9]+]], sp 140; ARM64: mov [[OFFSET:x[0-9]+]], #8000 141; ARM64: add x[[ADDR:[0-9]+]], [[ARRAY]], [[OFFSET]] 142; ARM64: ldrb [[BYTE:w[0-9]+]], [x[[ADDR]]] 143; ARM64: strb [[BYTE]], [x0] 144 %array = alloca i8, i32 8192 145 %elem = getelementptr i8, ptr %array, i32 8000 146 call void @llvm.memcpy.p0.p0.i64(ptr %dst, ptr %elem, i64 1, i1 false) 147 ret void 148} 149