xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-addr-type-promotion.ll (revision e0919b189bf2df4f97f22ba40260ab5153988b14)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=arm64-apple-ios3.0.0 -aarch64-enable-collect-loh=false | FileCheck %s
3; rdar://13452552
4; Disable the collecting of LOH so that the labels do not get in the
5; way of the NEXT patterns.
6target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128"
7
8@block = common global ptr null, align 8
9
10define zeroext i8 @fullGtU(i32 %i1, i32 %i2) {
11; CHECK-LABEL: fullGtU:
12; CHECK:       ; %bb.0: ; %entry
13; CHECK-NEXT:    adrp x9, _block@GOTPAGE
14; CHECK-NEXT:    ; kill: def $w1 killed $w1 def $x1
15; CHECK-NEXT:    ; kill: def $w0 killed $w0 def $x0
16; CHECK-NEXT:    sxtw x8, w0
17; CHECK-NEXT:    sxtw x10, w1
18; CHECK-NEXT:    ldr x9, [x9, _block@GOTPAGEOFF]
19; CHECK-NEXT:    ldr x9, [x9]
20; CHECK-NEXT:    ldrb w11, [x9, x8]
21; CHECK-NEXT:    ldrb w12, [x9, x10]
22; CHECK-NEXT:    cmp w11, w12
23; CHECK-NEXT:    b.ne LBB0_3
24; CHECK-NEXT:  ; %bb.1: ; %if.end
25; CHECK-NEXT:    add x8, x8, x9
26; CHECK-NEXT:    add x9, x10, x9
27; CHECK-NEXT:    ldrb w10, [x8, #1]
28; CHECK-NEXT:    ldrb w11, [x9, #1]
29; CHECK-NEXT:    cmp w10, w11
30; CHECK-NEXT:    b.ne LBB0_3
31; CHECK-NEXT:  ; %bb.2: ; %if.end25
32; CHECK-NEXT:    ldrb w8, [x8, #2]
33; CHECK-NEXT:    ldrb w9, [x9, #2]
34; CHECK-NEXT:    cmp w8, w9
35; CHECK-NEXT:    cset w8, hi
36; CHECK-NEXT:    csel w0, wzr, w8, eq
37; CHECK-NEXT:    ret
38; CHECK-NEXT:  LBB0_3: ; %if.then19
39; CHECK-NEXT:    cset w0, hi
40; CHECK-NEXT:    ret
41entry:
42  %idxprom = sext i32 %i1 to i64
43  %tmp = load ptr, ptr @block, align 8
44  %arrayidx = getelementptr inbounds i8, ptr %tmp, i64 %idxprom
45  %tmp1 = load i8, ptr %arrayidx, align 1
46  %idxprom1 = sext i32 %i2 to i64
47  %arrayidx2 = getelementptr inbounds i8, ptr %tmp, i64 %idxprom1
48  %tmp2 = load i8, ptr %arrayidx2, align 1
49  %cmp = icmp eq i8 %tmp1, %tmp2
50  br i1 %cmp, label %if.end, label %if.then
51
52if.then:                                          ; preds = %entry
53  %cmp7 = icmp ugt i8 %tmp1, %tmp2
54  %conv9 = zext i1 %cmp7 to i8
55  br label %return
56
57if.end:                                           ; preds = %entry
58  %inc = add nsw i32 %i1, 1
59  %inc10 = add nsw i32 %i2, 1
60  %idxprom11 = sext i32 %inc to i64
61  %arrayidx12 = getelementptr inbounds i8, ptr %tmp, i64 %idxprom11
62  %tmp3 = load i8, ptr %arrayidx12, align 1
63  %idxprom13 = sext i32 %inc10 to i64
64  %arrayidx14 = getelementptr inbounds i8, ptr %tmp, i64 %idxprom13
65  %tmp4 = load i8, ptr %arrayidx14, align 1
66  %cmp17 = icmp eq i8 %tmp3, %tmp4
67  br i1 %cmp17, label %if.end25, label %if.then19
68
69if.then19:                                        ; preds = %if.end
70  %cmp22 = icmp ugt i8 %tmp3, %tmp4
71  %conv24 = zext i1 %cmp22 to i8
72  br label %return
73
74if.end25:                                         ; preds = %if.end
75  %inc26 = add nsw i32 %i1, 2
76  %inc27 = add nsw i32 %i2, 2
77  %idxprom28 = sext i32 %inc26 to i64
78  %arrayidx29 = getelementptr inbounds i8, ptr %tmp, i64 %idxprom28
79  %tmp5 = load i8, ptr %arrayidx29, align 1
80  %idxprom30 = sext i32 %inc27 to i64
81  %arrayidx31 = getelementptr inbounds i8, ptr %tmp, i64 %idxprom30
82  %tmp6 = load i8, ptr %arrayidx31, align 1
83  %cmp34 = icmp eq i8 %tmp5, %tmp6
84  br i1 %cmp34, label %return, label %if.then36
85
86if.then36:                                        ; preds = %if.end25
87  %cmp39 = icmp ugt i8 %tmp5, %tmp6
88  %conv41 = zext i1 %cmp39 to i8
89  br label %return
90
91return:                                           ; preds = %if.then36, %if.end25, %if.then19, %if.then
92  %retval.0 = phi i8 [ %conv9, %if.then ], [ %conv24, %if.then19 ], [ %conv41, %if.then36 ], [ 0, %if.end25 ]
93  ret i8 %retval.0
94}
95