1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=-neon -fp-contract=fast | FileCheck %s --check-prefix=Aarch64 3; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s --check-prefix=Aarch64-Neon 4 5define float @f1(float %a, float %b, float %c) { 6; Aarch64-LABEL: f1: 7; Aarch64: // %bb.0: 8; Aarch64-NEXT: fmadd s0, s1, s0, s2 9; Aarch64-NEXT: ret 10; 11; Aarch64-Neon-LABEL: f1: 12; Aarch64-Neon: // %bb.0: 13; Aarch64-Neon-NEXT: fmadd s0, s1, s0, s2 14; Aarch64-Neon-NEXT: ret 15 %mul = fmul fast float %b, %a 16 %add = fadd fast float %mul, %c 17 ret float %add 18} 19 20define float @f2(float %a, float %b, float %c) { 21; Aarch64-LABEL: f2: 22; Aarch64: // %bb.0: 23; Aarch64-NEXT: fmul s0, s1, s0 24; Aarch64-NEXT: //ARITH_FENCE 25; Aarch64-NEXT: fadd s0, s0, s2 26; Aarch64-NEXT: ret 27; 28; Aarch64-Neon-LABEL: f2: 29; Aarch64-Neon: // %bb.0: 30; Aarch64-Neon-NEXT: fmul s0, s1, s0 31; Aarch64-Neon-NEXT: //ARITH_FENCE 32; Aarch64-Neon-NEXT: fadd s0, s0, s2 33; Aarch64-Neon-NEXT: ret 34 %mul = fmul fast float %b, %a 35 %tmp = call float @llvm.arithmetic.fence.f32(float %mul) 36 %add = fadd fast float %tmp, %c 37 ret float %add 38} 39 40define double @f3(double %a) { 41; Aarch64-LABEL: f3: 42; Aarch64: // %bb.0: 43; Aarch64-NEXT: fmov d1, #4.00000000 44; Aarch64-NEXT: fmul d0, d0, d1 45; Aarch64-NEXT: ret 46; 47; Aarch64-Neon-LABEL: f3: 48; Aarch64-Neon: // %bb.0: 49; Aarch64-Neon-NEXT: fmov d1, #4.00000000 50; Aarch64-Neon-NEXT: fmul d0, d0, d1 51; Aarch64-Neon-NEXT: ret 52 %1 = fadd fast double %a, %a 53 %2 = fadd fast double %a, %a 54 %3 = fadd fast double %1, %2 55 ret double %3 56} 57 58define double @f4(double %a) { 59; Aarch64-LABEL: f4: 60; Aarch64: // %bb.0: 61; Aarch64-NEXT: fadd d0, d0, d0 62; Aarch64-NEXT: fmov d1, d0 63; Aarch64-NEXT: //ARITH_FENCE 64; Aarch64-NEXT: fadd d0, d1, d0 65; Aarch64-NEXT: ret 66; 67; Aarch64-Neon-LABEL: f4: 68; Aarch64-Neon: // %bb.0: 69; Aarch64-Neon-NEXT: fadd d0, d0, d0 70; Aarch64-Neon-NEXT: fmov d1, d0 71; Aarch64-Neon-NEXT: //ARITH_FENCE 72; Aarch64-Neon-NEXT: fadd d0, d1, d0 73; Aarch64-Neon-NEXT: ret 74 %1 = fadd fast double %a, %a 75 %t = call double @llvm.arithmetic.fence.f64(double %1) 76 %2 = fadd fast double %a, %a 77 %3 = fadd fast double %t, %2 78 ret double %3 79} 80 81define <2 x float> @f5(<2 x float> %a) { 82; Aarch64-LABEL: f5: 83; Aarch64: // %bb.0: 84; Aarch64-NEXT: fmov s2, #4.00000000 85; Aarch64-NEXT: fmul s0, s0, s2 86; Aarch64-NEXT: fmul s1, s1, s2 87; Aarch64-NEXT: ret 88; 89; Aarch64-Neon-LABEL: f5: 90; Aarch64-Neon: // %bb.0: 91; Aarch64-Neon-NEXT: fmov v1.2s, #4.00000000 92; Aarch64-Neon-NEXT: fmul v0.2s, v0.2s, v1.2s 93; Aarch64-Neon-NEXT: ret 94 %1 = fadd fast <2 x float> %a, %a 95 %2 = fadd fast <2 x float> %a, %a 96 %3 = fadd fast <2 x float> %1, %2 97 ret <2 x float> %3 98} 99 100define <2 x float> @f6(<2 x float> %a) { 101; Aarch64-LABEL: f6: 102; Aarch64: // %bb.0: 103; Aarch64-NEXT: fadd s0, s0, s0 104; Aarch64-NEXT: fadd s1, s1, s1 105; Aarch64-NEXT: fmov s2, s1 106; Aarch64-NEXT: fmov s3, s0 107; Aarch64-NEXT: //ARITH_FENCE 108; Aarch64-NEXT: //ARITH_FENCE 109; Aarch64-NEXT: fadd s0, s3, s0 110; Aarch64-NEXT: fadd s1, s2, s1 111; Aarch64-NEXT: ret 112; 113; Aarch64-Neon-LABEL: f6: 114; Aarch64-Neon: // %bb.0: 115; Aarch64-Neon-NEXT: fadd v0.2s, v0.2s, v0.2s 116; Aarch64-Neon-NEXT: fmov d1, d0 117; Aarch64-Neon-NEXT: //ARITH_FENCE 118; Aarch64-Neon-NEXT: fadd v0.2s, v1.2s, v0.2s 119; Aarch64-Neon-NEXT: ret 120 %1 = fadd fast <2 x float> %a, %a 121 %t = call <2 x float> @llvm.arithmetic.fence.v2f32(<2 x float> %1) 122 %2 = fadd fast <2 x float> %a, %a 123 %3 = fadd fast <2 x float> %t, %2 124 ret <2 x float> %3 125} 126 127declare float @llvm.arithmetic.fence.f32(float) 128declare double @llvm.arithmetic.fence.f64(double) 129declare <2 x float> @llvm.arithmetic.fence.v2f32(<2 x float>) 130