1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-none-elf -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,SDISEL 3; RUN: llc -mtriple=aarch64-none-elf -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,GISEL 4 5define i32 @and_eq_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 6; SDISEL-LABEL: and_eq_eq: 7; SDISEL: // %bb.0: // %entry 8; SDISEL-NEXT: cmp w0, w1 9; SDISEL-NEXT: ccmp w2, w3, #0, eq 10; SDISEL-NEXT: cset w0, eq 11; SDISEL-NEXT: ret 12; 13; GISEL-LABEL: and_eq_eq: 14; GISEL: // %bb.0: // %entry 15; GISEL-NEXT: cmp w0, w1 16; GISEL-NEXT: cset w8, eq 17; GISEL-NEXT: cmp w2, w3 18; GISEL-NEXT: cset w9, eq 19; GISEL-NEXT: and w0, w8, w9 20; GISEL-NEXT: ret 21entry: 22 %c0 = icmp eq i32 %s0, %s1 23 %c1 = icmp eq i32 %s2, %s3 24 %a = and i1 %c0, %c1 25 %z = zext i1 %a to i32 26 ret i32 %z 27} 28 29define i32 @and_eq_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 30; SDISEL-LABEL: and_eq_ne: 31; SDISEL: // %bb.0: // %entry 32; SDISEL-NEXT: cmp w0, w1 33; SDISEL-NEXT: ccmp w2, w3, #4, eq 34; SDISEL-NEXT: cset w0, ne 35; SDISEL-NEXT: ret 36; 37; GISEL-LABEL: and_eq_ne: 38; GISEL: // %bb.0: // %entry 39; GISEL-NEXT: cmp w0, w1 40; GISEL-NEXT: cset w8, eq 41; GISEL-NEXT: cmp w2, w3 42; GISEL-NEXT: cset w9, ne 43; GISEL-NEXT: and w0, w8, w9 44; GISEL-NEXT: ret 45entry: 46 %c0 = icmp eq i32 %s0, %s1 47 %c1 = icmp ne i32 %s2, %s3 48 %a = and i1 %c0, %c1 49 %z = zext i1 %a to i32 50 ret i32 %z 51} 52 53define i32 @and_eq_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 54; SDISEL-LABEL: and_eq_ult: 55; SDISEL: // %bb.0: // %entry 56; SDISEL-NEXT: cmp w0, w1 57; SDISEL-NEXT: ccmp w2, w3, #2, eq 58; SDISEL-NEXT: cset w0, lo 59; SDISEL-NEXT: ret 60; 61; GISEL-LABEL: and_eq_ult: 62; GISEL: // %bb.0: // %entry 63; GISEL-NEXT: cmp w0, w1 64; GISEL-NEXT: cset w8, eq 65; GISEL-NEXT: cmp w2, w3 66; GISEL-NEXT: cset w9, lo 67; GISEL-NEXT: and w0, w8, w9 68; GISEL-NEXT: ret 69entry: 70 %c0 = icmp eq i32 %s0, %s1 71 %c1 = icmp ult i32 %s2, %s3 72 %a = and i1 %c0, %c1 73 %z = zext i1 %a to i32 74 ret i32 %z 75} 76 77define i32 @and_eq_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 78; SDISEL-LABEL: and_eq_ule: 79; SDISEL: // %bb.0: // %entry 80; SDISEL-NEXT: cmp w0, w1 81; SDISEL-NEXT: ccmp w2, w3, #2, eq 82; SDISEL-NEXT: cset w0, ls 83; SDISEL-NEXT: ret 84; 85; GISEL-LABEL: and_eq_ule: 86; GISEL: // %bb.0: // %entry 87; GISEL-NEXT: cmp w0, w1 88; GISEL-NEXT: cset w8, eq 89; GISEL-NEXT: cmp w2, w3 90; GISEL-NEXT: cset w9, ls 91; GISEL-NEXT: and w0, w8, w9 92; GISEL-NEXT: ret 93entry: 94 %c0 = icmp eq i32 %s0, %s1 95 %c1 = icmp ule i32 %s2, %s3 96 %a = and i1 %c0, %c1 97 %z = zext i1 %a to i32 98 ret i32 %z 99} 100 101define i32 @and_eq_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 102; SDISEL-LABEL: and_eq_ugt: 103; SDISEL: // %bb.0: // %entry 104; SDISEL-NEXT: cmp w0, w1 105; SDISEL-NEXT: ccmp w2, w3, #0, eq 106; SDISEL-NEXT: cset w0, hi 107; SDISEL-NEXT: ret 108; 109; GISEL-LABEL: and_eq_ugt: 110; GISEL: // %bb.0: // %entry 111; GISEL-NEXT: cmp w0, w1 112; GISEL-NEXT: cset w8, eq 113; GISEL-NEXT: cmp w2, w3 114; GISEL-NEXT: cset w9, hi 115; GISEL-NEXT: and w0, w8, w9 116; GISEL-NEXT: ret 117entry: 118 %c0 = icmp eq i32 %s0, %s1 119 %c1 = icmp ugt i32 %s2, %s3 120 %a = and i1 %c0, %c1 121 %z = zext i1 %a to i32 122 ret i32 %z 123} 124 125define i32 @and_eq_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 126; SDISEL-LABEL: and_eq_uge: 127; SDISEL: // %bb.0: // %entry 128; SDISEL-NEXT: cmp w0, w1 129; SDISEL-NEXT: ccmp w2, w3, #0, eq 130; SDISEL-NEXT: cset w0, hs 131; SDISEL-NEXT: ret 132; 133; GISEL-LABEL: and_eq_uge: 134; GISEL: // %bb.0: // %entry 135; GISEL-NEXT: cmp w0, w1 136; GISEL-NEXT: cset w8, eq 137; GISEL-NEXT: cmp w2, w3 138; GISEL-NEXT: cset w9, hs 139; GISEL-NEXT: and w0, w8, w9 140; GISEL-NEXT: ret 141entry: 142 %c0 = icmp eq i32 %s0, %s1 143 %c1 = icmp uge i32 %s2, %s3 144 %a = and i1 %c0, %c1 145 %z = zext i1 %a to i32 146 ret i32 %z 147} 148 149define i32 @and_eq_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 150; SDISEL-LABEL: and_eq_slt: 151; SDISEL: // %bb.0: // %entry 152; SDISEL-NEXT: cmp w0, w1 153; SDISEL-NEXT: ccmp w2, w3, #0, eq 154; SDISEL-NEXT: cset w0, lt 155; SDISEL-NEXT: ret 156; 157; GISEL-LABEL: and_eq_slt: 158; GISEL: // %bb.0: // %entry 159; GISEL-NEXT: cmp w0, w1 160; GISEL-NEXT: cset w8, eq 161; GISEL-NEXT: cmp w2, w3 162; GISEL-NEXT: cset w9, lt 163; GISEL-NEXT: and w0, w8, w9 164; GISEL-NEXT: ret 165entry: 166 %c0 = icmp eq i32 %s0, %s1 167 %c1 = icmp slt i32 %s2, %s3 168 %a = and i1 %c0, %c1 169 %z = zext i1 %a to i32 170 ret i32 %z 171} 172 173define i32 @and_eq_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 174; SDISEL-LABEL: and_eq_sle: 175; SDISEL: // %bb.0: // %entry 176; SDISEL-NEXT: cmp w0, w1 177; SDISEL-NEXT: ccmp w2, w3, #0, eq 178; SDISEL-NEXT: cset w0, le 179; SDISEL-NEXT: ret 180; 181; GISEL-LABEL: and_eq_sle: 182; GISEL: // %bb.0: // %entry 183; GISEL-NEXT: cmp w0, w1 184; GISEL-NEXT: cset w8, eq 185; GISEL-NEXT: cmp w2, w3 186; GISEL-NEXT: cset w9, le 187; GISEL-NEXT: and w0, w8, w9 188; GISEL-NEXT: ret 189entry: 190 %c0 = icmp eq i32 %s0, %s1 191 %c1 = icmp sle i32 %s2, %s3 192 %a = and i1 %c0, %c1 193 %z = zext i1 %a to i32 194 ret i32 %z 195} 196 197define i32 @and_eq_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 198; SDISEL-LABEL: and_eq_sgt: 199; SDISEL: // %bb.0: // %entry 200; SDISEL-NEXT: cmp w0, w1 201; SDISEL-NEXT: ccmp w2, w3, #4, eq 202; SDISEL-NEXT: cset w0, gt 203; SDISEL-NEXT: ret 204; 205; GISEL-LABEL: and_eq_sgt: 206; GISEL: // %bb.0: // %entry 207; GISEL-NEXT: cmp w0, w1 208; GISEL-NEXT: cset w8, eq 209; GISEL-NEXT: cmp w2, w3 210; GISEL-NEXT: cset w9, gt 211; GISEL-NEXT: and w0, w8, w9 212; GISEL-NEXT: ret 213entry: 214 %c0 = icmp eq i32 %s0, %s1 215 %c1 = icmp sgt i32 %s2, %s3 216 %a = and i1 %c0, %c1 217 %z = zext i1 %a to i32 218 ret i32 %z 219} 220 221define i32 @and_eq_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 222; SDISEL-LABEL: and_eq_sge: 223; SDISEL: // %bb.0: // %entry 224; SDISEL-NEXT: cmp w0, w1 225; SDISEL-NEXT: ccmp w2, w3, #8, eq 226; SDISEL-NEXT: cset w0, ge 227; SDISEL-NEXT: ret 228; 229; GISEL-LABEL: and_eq_sge: 230; GISEL: // %bb.0: // %entry 231; GISEL-NEXT: cmp w0, w1 232; GISEL-NEXT: cset w8, eq 233; GISEL-NEXT: cmp w2, w3 234; GISEL-NEXT: cset w9, ge 235; GISEL-NEXT: and w0, w8, w9 236; GISEL-NEXT: ret 237entry: 238 %c0 = icmp eq i32 %s0, %s1 239 %c1 = icmp sge i32 %s2, %s3 240 %a = and i1 %c0, %c1 241 %z = zext i1 %a to i32 242 ret i32 %z 243} 244 245define i32 @and_ne_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 246; SDISEL-LABEL: and_ne_eq: 247; SDISEL: // %bb.0: // %entry 248; SDISEL-NEXT: cmp w0, w1 249; SDISEL-NEXT: ccmp w2, w3, #0, ne 250; SDISEL-NEXT: cset w0, eq 251; SDISEL-NEXT: ret 252; 253; GISEL-LABEL: and_ne_eq: 254; GISEL: // %bb.0: // %entry 255; GISEL-NEXT: cmp w0, w1 256; GISEL-NEXT: cset w8, ne 257; GISEL-NEXT: cmp w2, w3 258; GISEL-NEXT: cset w9, eq 259; GISEL-NEXT: and w0, w8, w9 260; GISEL-NEXT: ret 261entry: 262 %c0 = icmp ne i32 %s0, %s1 263 %c1 = icmp eq i32 %s2, %s3 264 %a = and i1 %c0, %c1 265 %z = zext i1 %a to i32 266 ret i32 %z 267} 268 269define i32 @and_ne_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 270; SDISEL-LABEL: and_ne_ne: 271; SDISEL: // %bb.0: // %entry 272; SDISEL-NEXT: cmp w0, w1 273; SDISEL-NEXT: ccmp w2, w3, #4, ne 274; SDISEL-NEXT: cset w0, ne 275; SDISEL-NEXT: ret 276; 277; GISEL-LABEL: and_ne_ne: 278; GISEL: // %bb.0: // %entry 279; GISEL-NEXT: cmp w0, w1 280; GISEL-NEXT: cset w8, ne 281; GISEL-NEXT: cmp w2, w3 282; GISEL-NEXT: cset w9, ne 283; GISEL-NEXT: and w0, w8, w9 284; GISEL-NEXT: ret 285entry: 286 %c0 = icmp ne i32 %s0, %s1 287 %c1 = icmp ne i32 %s2, %s3 288 %a = and i1 %c0, %c1 289 %z = zext i1 %a to i32 290 ret i32 %z 291} 292 293define i32 @and_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 294; SDISEL-LABEL: and_ne_ult: 295; SDISEL: // %bb.0: // %entry 296; SDISEL-NEXT: cmp w0, w1 297; SDISEL-NEXT: ccmp w2, w3, #2, ne 298; SDISEL-NEXT: cset w0, lo 299; SDISEL-NEXT: ret 300; 301; GISEL-LABEL: and_ne_ult: 302; GISEL: // %bb.0: // %entry 303; GISEL-NEXT: cmp w0, w1 304; GISEL-NEXT: cset w8, ne 305; GISEL-NEXT: cmp w2, w3 306; GISEL-NEXT: cset w9, lo 307; GISEL-NEXT: and w0, w8, w9 308; GISEL-NEXT: ret 309entry: 310 %c0 = icmp ne i32 %s0, %s1 311 %c1 = icmp ult i32 %s2, %s3 312 %a = and i1 %c0, %c1 313 %z = zext i1 %a to i32 314 ret i32 %z 315} 316 317define i32 @and_ne_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 318; SDISEL-LABEL: and_ne_ule: 319; SDISEL: // %bb.0: // %entry 320; SDISEL-NEXT: cmp w0, w1 321; SDISEL-NEXT: ccmp w2, w3, #2, ne 322; SDISEL-NEXT: cset w0, ls 323; SDISEL-NEXT: ret 324; 325; GISEL-LABEL: and_ne_ule: 326; GISEL: // %bb.0: // %entry 327; GISEL-NEXT: cmp w0, w1 328; GISEL-NEXT: cset w8, ne 329; GISEL-NEXT: cmp w2, w3 330; GISEL-NEXT: cset w9, ls 331; GISEL-NEXT: and w0, w8, w9 332; GISEL-NEXT: ret 333entry: 334 %c0 = icmp ne i32 %s0, %s1 335 %c1 = icmp ule i32 %s2, %s3 336 %a = and i1 %c0, %c1 337 %z = zext i1 %a to i32 338 ret i32 %z 339} 340 341define i32 @and_ne_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 342; SDISEL-LABEL: and_ne_ugt: 343; SDISEL: // %bb.0: // %entry 344; SDISEL-NEXT: cmp w0, w1 345; SDISEL-NEXT: ccmp w2, w3, #0, ne 346; SDISEL-NEXT: cset w0, hi 347; SDISEL-NEXT: ret 348; 349; GISEL-LABEL: and_ne_ugt: 350; GISEL: // %bb.0: // %entry 351; GISEL-NEXT: cmp w0, w1 352; GISEL-NEXT: cset w8, ne 353; GISEL-NEXT: cmp w2, w3 354; GISEL-NEXT: cset w9, hi 355; GISEL-NEXT: and w0, w8, w9 356; GISEL-NEXT: ret 357entry: 358 %c0 = icmp ne i32 %s0, %s1 359 %c1 = icmp ugt i32 %s2, %s3 360 %a = and i1 %c0, %c1 361 %z = zext i1 %a to i32 362 ret i32 %z 363} 364 365define i32 @and_ne_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 366; SDISEL-LABEL: and_ne_uge: 367; SDISEL: // %bb.0: // %entry 368; SDISEL-NEXT: cmp w0, w1 369; SDISEL-NEXT: ccmp w2, w3, #0, ne 370; SDISEL-NEXT: cset w0, hs 371; SDISEL-NEXT: ret 372; 373; GISEL-LABEL: and_ne_uge: 374; GISEL: // %bb.0: // %entry 375; GISEL-NEXT: cmp w0, w1 376; GISEL-NEXT: cset w8, ne 377; GISEL-NEXT: cmp w2, w3 378; GISEL-NEXT: cset w9, hs 379; GISEL-NEXT: and w0, w8, w9 380; GISEL-NEXT: ret 381entry: 382 %c0 = icmp ne i32 %s0, %s1 383 %c1 = icmp uge i32 %s2, %s3 384 %a = and i1 %c0, %c1 385 %z = zext i1 %a to i32 386 ret i32 %z 387} 388 389define i32 @and_ne_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 390; SDISEL-LABEL: and_ne_slt: 391; SDISEL: // %bb.0: // %entry 392; SDISEL-NEXT: cmp w0, w1 393; SDISEL-NEXT: ccmp w2, w3, #0, ne 394; SDISEL-NEXT: cset w0, lt 395; SDISEL-NEXT: ret 396; 397; GISEL-LABEL: and_ne_slt: 398; GISEL: // %bb.0: // %entry 399; GISEL-NEXT: cmp w0, w1 400; GISEL-NEXT: cset w8, ne 401; GISEL-NEXT: cmp w2, w3 402; GISEL-NEXT: cset w9, lt 403; GISEL-NEXT: and w0, w8, w9 404; GISEL-NEXT: ret 405entry: 406 %c0 = icmp ne i32 %s0, %s1 407 %c1 = icmp slt i32 %s2, %s3 408 %a = and i1 %c0, %c1 409 %z = zext i1 %a to i32 410 ret i32 %z 411} 412 413define i32 @and_ne_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 414; SDISEL-LABEL: and_ne_sle: 415; SDISEL: // %bb.0: // %entry 416; SDISEL-NEXT: cmp w0, w1 417; SDISEL-NEXT: ccmp w2, w3, #0, ne 418; SDISEL-NEXT: cset w0, le 419; SDISEL-NEXT: ret 420; 421; GISEL-LABEL: and_ne_sle: 422; GISEL: // %bb.0: // %entry 423; GISEL-NEXT: cmp w0, w1 424; GISEL-NEXT: cset w8, ne 425; GISEL-NEXT: cmp w2, w3 426; GISEL-NEXT: cset w9, le 427; GISEL-NEXT: and w0, w8, w9 428; GISEL-NEXT: ret 429entry: 430 %c0 = icmp ne i32 %s0, %s1 431 %c1 = icmp sle i32 %s2, %s3 432 %a = and i1 %c0, %c1 433 %z = zext i1 %a to i32 434 ret i32 %z 435} 436 437define i32 @and_ne_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 438; SDISEL-LABEL: and_ne_sgt: 439; SDISEL: // %bb.0: // %entry 440; SDISEL-NEXT: cmp w0, w1 441; SDISEL-NEXT: ccmp w2, w3, #4, ne 442; SDISEL-NEXT: cset w0, gt 443; SDISEL-NEXT: ret 444; 445; GISEL-LABEL: and_ne_sgt: 446; GISEL: // %bb.0: // %entry 447; GISEL-NEXT: cmp w0, w1 448; GISEL-NEXT: cset w8, ne 449; GISEL-NEXT: cmp w2, w3 450; GISEL-NEXT: cset w9, gt 451; GISEL-NEXT: and w0, w8, w9 452; GISEL-NEXT: ret 453entry: 454 %c0 = icmp ne i32 %s0, %s1 455 %c1 = icmp sgt i32 %s2, %s3 456 %a = and i1 %c0, %c1 457 %z = zext i1 %a to i32 458 ret i32 %z 459} 460 461define i32 @and_ne_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 462; SDISEL-LABEL: and_ne_sge: 463; SDISEL: // %bb.0: // %entry 464; SDISEL-NEXT: cmp w0, w1 465; SDISEL-NEXT: ccmp w2, w3, #8, ne 466; SDISEL-NEXT: cset w0, ge 467; SDISEL-NEXT: ret 468; 469; GISEL-LABEL: and_ne_sge: 470; GISEL: // %bb.0: // %entry 471; GISEL-NEXT: cmp w0, w1 472; GISEL-NEXT: cset w8, ne 473; GISEL-NEXT: cmp w2, w3 474; GISEL-NEXT: cset w9, ge 475; GISEL-NEXT: and w0, w8, w9 476; GISEL-NEXT: ret 477entry: 478 %c0 = icmp ne i32 %s0, %s1 479 %c1 = icmp sge i32 %s2, %s3 480 %a = and i1 %c0, %c1 481 %z = zext i1 %a to i32 482 ret i32 %z 483} 484 485define i32 @and_ult_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 486; SDISEL-LABEL: and_ult_eq: 487; SDISEL: // %bb.0: // %entry 488; SDISEL-NEXT: cmp w0, w1 489; SDISEL-NEXT: ccmp w2, w3, #0, lo 490; SDISEL-NEXT: cset w0, eq 491; SDISEL-NEXT: ret 492; 493; GISEL-LABEL: and_ult_eq: 494; GISEL: // %bb.0: // %entry 495; GISEL-NEXT: cmp w0, w1 496; GISEL-NEXT: cset w8, lo 497; GISEL-NEXT: cmp w2, w3 498; GISEL-NEXT: cset w9, eq 499; GISEL-NEXT: and w0, w8, w9 500; GISEL-NEXT: ret 501entry: 502 %c0 = icmp ult i32 %s0, %s1 503 %c1 = icmp eq i32 %s2, %s3 504 %a = and i1 %c0, %c1 505 %z = zext i1 %a to i32 506 ret i32 %z 507} 508 509define i32 @and_ult_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 510; SDISEL-LABEL: and_ult_ne: 511; SDISEL: // %bb.0: // %entry 512; SDISEL-NEXT: cmp w0, w1 513; SDISEL-NEXT: ccmp w2, w3, #4, lo 514; SDISEL-NEXT: cset w0, ne 515; SDISEL-NEXT: ret 516; 517; GISEL-LABEL: and_ult_ne: 518; GISEL: // %bb.0: // %entry 519; GISEL-NEXT: cmp w0, w1 520; GISEL-NEXT: cset w8, lo 521; GISEL-NEXT: cmp w2, w3 522; GISEL-NEXT: cset w9, ne 523; GISEL-NEXT: and w0, w8, w9 524; GISEL-NEXT: ret 525entry: 526 %c0 = icmp ult i32 %s0, %s1 527 %c1 = icmp ne i32 %s2, %s3 528 %a = and i1 %c0, %c1 529 %z = zext i1 %a to i32 530 ret i32 %z 531} 532 533define i32 @and_ult_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 534; SDISEL-LABEL: and_ult_ult: 535; SDISEL: // %bb.0: // %entry 536; SDISEL-NEXT: cmp w0, w1 537; SDISEL-NEXT: ccmp w2, w3, #2, lo 538; SDISEL-NEXT: cset w0, lo 539; SDISEL-NEXT: ret 540; 541; GISEL-LABEL: and_ult_ult: 542; GISEL: // %bb.0: // %entry 543; GISEL-NEXT: cmp w0, w1 544; GISEL-NEXT: cset w8, lo 545; GISEL-NEXT: cmp w2, w3 546; GISEL-NEXT: cset w9, lo 547; GISEL-NEXT: and w0, w8, w9 548; GISEL-NEXT: ret 549entry: 550 %c0 = icmp ult i32 %s0, %s1 551 %c1 = icmp ult i32 %s2, %s3 552 %a = and i1 %c0, %c1 553 %z = zext i1 %a to i32 554 ret i32 %z 555} 556 557define i32 @and_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 558; SDISEL-LABEL: and_ult_ule: 559; SDISEL: // %bb.0: // %entry 560; SDISEL-NEXT: cmp w0, w1 561; SDISEL-NEXT: ccmp w2, w3, #2, lo 562; SDISEL-NEXT: cset w0, ls 563; SDISEL-NEXT: ret 564; 565; GISEL-LABEL: and_ult_ule: 566; GISEL: // %bb.0: // %entry 567; GISEL-NEXT: cmp w0, w1 568; GISEL-NEXT: cset w8, lo 569; GISEL-NEXT: cmp w2, w3 570; GISEL-NEXT: cset w9, ls 571; GISEL-NEXT: and w0, w8, w9 572; GISEL-NEXT: ret 573entry: 574 %c0 = icmp ult i32 %s0, %s1 575 %c1 = icmp ule i32 %s2, %s3 576 %a = and i1 %c0, %c1 577 %z = zext i1 %a to i32 578 ret i32 %z 579} 580 581define i32 @and_ult_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 582; SDISEL-LABEL: and_ult_ugt: 583; SDISEL: // %bb.0: // %entry 584; SDISEL-NEXT: cmp w0, w1 585; SDISEL-NEXT: ccmp w2, w3, #0, lo 586; SDISEL-NEXT: cset w0, hi 587; SDISEL-NEXT: ret 588; 589; GISEL-LABEL: and_ult_ugt: 590; GISEL: // %bb.0: // %entry 591; GISEL-NEXT: cmp w0, w1 592; GISEL-NEXT: cset w8, lo 593; GISEL-NEXT: cmp w2, w3 594; GISEL-NEXT: cset w9, hi 595; GISEL-NEXT: and w0, w8, w9 596; GISEL-NEXT: ret 597entry: 598 %c0 = icmp ult i32 %s0, %s1 599 %c1 = icmp ugt i32 %s2, %s3 600 %a = and i1 %c0, %c1 601 %z = zext i1 %a to i32 602 ret i32 %z 603} 604 605define i32 @and_ult_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 606; SDISEL-LABEL: and_ult_uge: 607; SDISEL: // %bb.0: // %entry 608; SDISEL-NEXT: cmp w0, w1 609; SDISEL-NEXT: ccmp w2, w3, #0, lo 610; SDISEL-NEXT: cset w0, hs 611; SDISEL-NEXT: ret 612; 613; GISEL-LABEL: and_ult_uge: 614; GISEL: // %bb.0: // %entry 615; GISEL-NEXT: cmp w0, w1 616; GISEL-NEXT: cset w8, lo 617; GISEL-NEXT: cmp w2, w3 618; GISEL-NEXT: cset w9, hs 619; GISEL-NEXT: and w0, w8, w9 620; GISEL-NEXT: ret 621entry: 622 %c0 = icmp ult i32 %s0, %s1 623 %c1 = icmp uge i32 %s2, %s3 624 %a = and i1 %c0, %c1 625 %z = zext i1 %a to i32 626 ret i32 %z 627} 628 629define i32 @and_ult_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 630; SDISEL-LABEL: and_ult_slt: 631; SDISEL: // %bb.0: // %entry 632; SDISEL-NEXT: cmp w0, w1 633; SDISEL-NEXT: ccmp w2, w3, #0, lo 634; SDISEL-NEXT: cset w0, lt 635; SDISEL-NEXT: ret 636; 637; GISEL-LABEL: and_ult_slt: 638; GISEL: // %bb.0: // %entry 639; GISEL-NEXT: cmp w0, w1 640; GISEL-NEXT: cset w8, lo 641; GISEL-NEXT: cmp w2, w3 642; GISEL-NEXT: cset w9, lt 643; GISEL-NEXT: and w0, w8, w9 644; GISEL-NEXT: ret 645entry: 646 %c0 = icmp ult i32 %s0, %s1 647 %c1 = icmp slt i32 %s2, %s3 648 %a = and i1 %c0, %c1 649 %z = zext i1 %a to i32 650 ret i32 %z 651} 652 653define i32 @and_ult_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 654; SDISEL-LABEL: and_ult_sle: 655; SDISEL: // %bb.0: // %entry 656; SDISEL-NEXT: cmp w0, w1 657; SDISEL-NEXT: ccmp w2, w3, #0, lo 658; SDISEL-NEXT: cset w0, le 659; SDISEL-NEXT: ret 660; 661; GISEL-LABEL: and_ult_sle: 662; GISEL: // %bb.0: // %entry 663; GISEL-NEXT: cmp w0, w1 664; GISEL-NEXT: cset w8, lo 665; GISEL-NEXT: cmp w2, w3 666; GISEL-NEXT: cset w9, le 667; GISEL-NEXT: and w0, w8, w9 668; GISEL-NEXT: ret 669entry: 670 %c0 = icmp ult i32 %s0, %s1 671 %c1 = icmp sle i32 %s2, %s3 672 %a = and i1 %c0, %c1 673 %z = zext i1 %a to i32 674 ret i32 %z 675} 676 677define i32 @and_ult_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 678; SDISEL-LABEL: and_ult_sgt: 679; SDISEL: // %bb.0: // %entry 680; SDISEL-NEXT: cmp w0, w1 681; SDISEL-NEXT: ccmp w2, w3, #4, lo 682; SDISEL-NEXT: cset w0, gt 683; SDISEL-NEXT: ret 684; 685; GISEL-LABEL: and_ult_sgt: 686; GISEL: // %bb.0: // %entry 687; GISEL-NEXT: cmp w0, w1 688; GISEL-NEXT: cset w8, lo 689; GISEL-NEXT: cmp w2, w3 690; GISEL-NEXT: cset w9, gt 691; GISEL-NEXT: and w0, w8, w9 692; GISEL-NEXT: ret 693entry: 694 %c0 = icmp ult i32 %s0, %s1 695 %c1 = icmp sgt i32 %s2, %s3 696 %a = and i1 %c0, %c1 697 %z = zext i1 %a to i32 698 ret i32 %z 699} 700 701define i32 @and_ult_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 702; SDISEL-LABEL: and_ult_sge: 703; SDISEL: // %bb.0: // %entry 704; SDISEL-NEXT: cmp w0, w1 705; SDISEL-NEXT: ccmp w2, w3, #8, lo 706; SDISEL-NEXT: cset w0, ge 707; SDISEL-NEXT: ret 708; 709; GISEL-LABEL: and_ult_sge: 710; GISEL: // %bb.0: // %entry 711; GISEL-NEXT: cmp w0, w1 712; GISEL-NEXT: cset w8, lo 713; GISEL-NEXT: cmp w2, w3 714; GISEL-NEXT: cset w9, ge 715; GISEL-NEXT: and w0, w8, w9 716; GISEL-NEXT: ret 717entry: 718 %c0 = icmp ult i32 %s0, %s1 719 %c1 = icmp sge i32 %s2, %s3 720 %a = and i1 %c0, %c1 721 %z = zext i1 %a to i32 722 ret i32 %z 723} 724 725define i32 @and_ule_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 726; SDISEL-LABEL: and_ule_eq: 727; SDISEL: // %bb.0: // %entry 728; SDISEL-NEXT: cmp w0, w1 729; SDISEL-NEXT: ccmp w2, w3, #0, ls 730; SDISEL-NEXT: cset w0, eq 731; SDISEL-NEXT: ret 732; 733; GISEL-LABEL: and_ule_eq: 734; GISEL: // %bb.0: // %entry 735; GISEL-NEXT: cmp w0, w1 736; GISEL-NEXT: cset w8, ls 737; GISEL-NEXT: cmp w2, w3 738; GISEL-NEXT: cset w9, eq 739; GISEL-NEXT: and w0, w8, w9 740; GISEL-NEXT: ret 741entry: 742 %c0 = icmp ule i32 %s0, %s1 743 %c1 = icmp eq i32 %s2, %s3 744 %a = and i1 %c0, %c1 745 %z = zext i1 %a to i32 746 ret i32 %z 747} 748 749define i32 @and_ule_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 750; SDISEL-LABEL: and_ule_ne: 751; SDISEL: // %bb.0: // %entry 752; SDISEL-NEXT: cmp w0, w1 753; SDISEL-NEXT: ccmp w2, w3, #4, ls 754; SDISEL-NEXT: cset w0, ne 755; SDISEL-NEXT: ret 756; 757; GISEL-LABEL: and_ule_ne: 758; GISEL: // %bb.0: // %entry 759; GISEL-NEXT: cmp w0, w1 760; GISEL-NEXT: cset w8, ls 761; GISEL-NEXT: cmp w2, w3 762; GISEL-NEXT: cset w9, ne 763; GISEL-NEXT: and w0, w8, w9 764; GISEL-NEXT: ret 765entry: 766 %c0 = icmp ule i32 %s0, %s1 767 %c1 = icmp ne i32 %s2, %s3 768 %a = and i1 %c0, %c1 769 %z = zext i1 %a to i32 770 ret i32 %z 771} 772 773define i32 @and_ule_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 774; SDISEL-LABEL: and_ule_ult: 775; SDISEL: // %bb.0: // %entry 776; SDISEL-NEXT: cmp w0, w1 777; SDISEL-NEXT: ccmp w2, w3, #2, ls 778; SDISEL-NEXT: cset w0, lo 779; SDISEL-NEXT: ret 780; 781; GISEL-LABEL: and_ule_ult: 782; GISEL: // %bb.0: // %entry 783; GISEL-NEXT: cmp w0, w1 784; GISEL-NEXT: cset w8, ls 785; GISEL-NEXT: cmp w2, w3 786; GISEL-NEXT: cset w9, lo 787; GISEL-NEXT: and w0, w8, w9 788; GISEL-NEXT: ret 789entry: 790 %c0 = icmp ule i32 %s0, %s1 791 %c1 = icmp ult i32 %s2, %s3 792 %a = and i1 %c0, %c1 793 %z = zext i1 %a to i32 794 ret i32 %z 795} 796 797define i32 @and_ule_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 798; SDISEL-LABEL: and_ule_ule: 799; SDISEL: // %bb.0: // %entry 800; SDISEL-NEXT: cmp w0, w1 801; SDISEL-NEXT: ccmp w2, w3, #2, ls 802; SDISEL-NEXT: cset w0, ls 803; SDISEL-NEXT: ret 804; 805; GISEL-LABEL: and_ule_ule: 806; GISEL: // %bb.0: // %entry 807; GISEL-NEXT: cmp w0, w1 808; GISEL-NEXT: cset w8, ls 809; GISEL-NEXT: cmp w2, w3 810; GISEL-NEXT: cset w9, ls 811; GISEL-NEXT: and w0, w8, w9 812; GISEL-NEXT: ret 813entry: 814 %c0 = icmp ule i32 %s0, %s1 815 %c1 = icmp ule i32 %s2, %s3 816 %a = and i1 %c0, %c1 817 %z = zext i1 %a to i32 818 ret i32 %z 819} 820 821define i32 @and_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 822; SDISEL-LABEL: and_ule_ugt: 823; SDISEL: // %bb.0: // %entry 824; SDISEL-NEXT: cmp w0, w1 825; SDISEL-NEXT: ccmp w2, w3, #0, ls 826; SDISEL-NEXT: cset w0, hi 827; SDISEL-NEXT: ret 828; 829; GISEL-LABEL: and_ule_ugt: 830; GISEL: // %bb.0: // %entry 831; GISEL-NEXT: cmp w0, w1 832; GISEL-NEXT: cset w8, ls 833; GISEL-NEXT: cmp w2, w3 834; GISEL-NEXT: cset w9, hi 835; GISEL-NEXT: and w0, w8, w9 836; GISEL-NEXT: ret 837entry: 838 %c0 = icmp ule i32 %s0, %s1 839 %c1 = icmp ugt i32 %s2, %s3 840 %a = and i1 %c0, %c1 841 %z = zext i1 %a to i32 842 ret i32 %z 843} 844 845define i32 @and_ule_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 846; SDISEL-LABEL: and_ule_uge: 847; SDISEL: // %bb.0: // %entry 848; SDISEL-NEXT: cmp w0, w1 849; SDISEL-NEXT: ccmp w2, w3, #0, ls 850; SDISEL-NEXT: cset w0, hs 851; SDISEL-NEXT: ret 852; 853; GISEL-LABEL: and_ule_uge: 854; GISEL: // %bb.0: // %entry 855; GISEL-NEXT: cmp w0, w1 856; GISEL-NEXT: cset w8, ls 857; GISEL-NEXT: cmp w2, w3 858; GISEL-NEXT: cset w9, hs 859; GISEL-NEXT: and w0, w8, w9 860; GISEL-NEXT: ret 861entry: 862 %c0 = icmp ule i32 %s0, %s1 863 %c1 = icmp uge i32 %s2, %s3 864 %a = and i1 %c0, %c1 865 %z = zext i1 %a to i32 866 ret i32 %z 867} 868 869define i32 @and_ule_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 870; SDISEL-LABEL: and_ule_slt: 871; SDISEL: // %bb.0: // %entry 872; SDISEL-NEXT: cmp w0, w1 873; SDISEL-NEXT: ccmp w2, w3, #0, ls 874; SDISEL-NEXT: cset w0, lt 875; SDISEL-NEXT: ret 876; 877; GISEL-LABEL: and_ule_slt: 878; GISEL: // %bb.0: // %entry 879; GISEL-NEXT: cmp w0, w1 880; GISEL-NEXT: cset w8, ls 881; GISEL-NEXT: cmp w2, w3 882; GISEL-NEXT: cset w9, lt 883; GISEL-NEXT: and w0, w8, w9 884; GISEL-NEXT: ret 885entry: 886 %c0 = icmp ule i32 %s0, %s1 887 %c1 = icmp slt i32 %s2, %s3 888 %a = and i1 %c0, %c1 889 %z = zext i1 %a to i32 890 ret i32 %z 891} 892 893define i32 @and_ule_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 894; SDISEL-LABEL: and_ule_sle: 895; SDISEL: // %bb.0: // %entry 896; SDISEL-NEXT: cmp w0, w1 897; SDISEL-NEXT: ccmp w2, w3, #0, ls 898; SDISEL-NEXT: cset w0, le 899; SDISEL-NEXT: ret 900; 901; GISEL-LABEL: and_ule_sle: 902; GISEL: // %bb.0: // %entry 903; GISEL-NEXT: cmp w0, w1 904; GISEL-NEXT: cset w8, ls 905; GISEL-NEXT: cmp w2, w3 906; GISEL-NEXT: cset w9, le 907; GISEL-NEXT: and w0, w8, w9 908; GISEL-NEXT: ret 909entry: 910 %c0 = icmp ule i32 %s0, %s1 911 %c1 = icmp sle i32 %s2, %s3 912 %a = and i1 %c0, %c1 913 %z = zext i1 %a to i32 914 ret i32 %z 915} 916 917define i32 @and_ule_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 918; SDISEL-LABEL: and_ule_sgt: 919; SDISEL: // %bb.0: // %entry 920; SDISEL-NEXT: cmp w0, w1 921; SDISEL-NEXT: ccmp w2, w3, #4, ls 922; SDISEL-NEXT: cset w0, gt 923; SDISEL-NEXT: ret 924; 925; GISEL-LABEL: and_ule_sgt: 926; GISEL: // %bb.0: // %entry 927; GISEL-NEXT: cmp w0, w1 928; GISEL-NEXT: cset w8, ls 929; GISEL-NEXT: cmp w2, w3 930; GISEL-NEXT: cset w9, gt 931; GISEL-NEXT: and w0, w8, w9 932; GISEL-NEXT: ret 933entry: 934 %c0 = icmp ule i32 %s0, %s1 935 %c1 = icmp sgt i32 %s2, %s3 936 %a = and i1 %c0, %c1 937 %z = zext i1 %a to i32 938 ret i32 %z 939} 940 941define i32 @and_ule_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 942; SDISEL-LABEL: and_ule_sge: 943; SDISEL: // %bb.0: // %entry 944; SDISEL-NEXT: cmp w0, w1 945; SDISEL-NEXT: ccmp w2, w3, #8, ls 946; SDISEL-NEXT: cset w0, ge 947; SDISEL-NEXT: ret 948; 949; GISEL-LABEL: and_ule_sge: 950; GISEL: // %bb.0: // %entry 951; GISEL-NEXT: cmp w0, w1 952; GISEL-NEXT: cset w8, ls 953; GISEL-NEXT: cmp w2, w3 954; GISEL-NEXT: cset w9, ge 955; GISEL-NEXT: and w0, w8, w9 956; GISEL-NEXT: ret 957entry: 958 %c0 = icmp ule i32 %s0, %s1 959 %c1 = icmp sge i32 %s2, %s3 960 %a = and i1 %c0, %c1 961 %z = zext i1 %a to i32 962 ret i32 %z 963} 964 965define i32 @and_ugt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 966; SDISEL-LABEL: and_ugt_eq: 967; SDISEL: // %bb.0: // %entry 968; SDISEL-NEXT: cmp w0, w1 969; SDISEL-NEXT: ccmp w2, w3, #0, hi 970; SDISEL-NEXT: cset w0, eq 971; SDISEL-NEXT: ret 972; 973; GISEL-LABEL: and_ugt_eq: 974; GISEL: // %bb.0: // %entry 975; GISEL-NEXT: cmp w0, w1 976; GISEL-NEXT: cset w8, hi 977; GISEL-NEXT: cmp w2, w3 978; GISEL-NEXT: cset w9, eq 979; GISEL-NEXT: and w0, w8, w9 980; GISEL-NEXT: ret 981entry: 982 %c0 = icmp ugt i32 %s0, %s1 983 %c1 = icmp eq i32 %s2, %s3 984 %a = and i1 %c0, %c1 985 %z = zext i1 %a to i32 986 ret i32 %z 987} 988 989define i32 @and_ugt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 990; SDISEL-LABEL: and_ugt_ne: 991; SDISEL: // %bb.0: // %entry 992; SDISEL-NEXT: cmp w0, w1 993; SDISEL-NEXT: ccmp w2, w3, #4, hi 994; SDISEL-NEXT: cset w0, ne 995; SDISEL-NEXT: ret 996; 997; GISEL-LABEL: and_ugt_ne: 998; GISEL: // %bb.0: // %entry 999; GISEL-NEXT: cmp w0, w1 1000; GISEL-NEXT: cset w8, hi 1001; GISEL-NEXT: cmp w2, w3 1002; GISEL-NEXT: cset w9, ne 1003; GISEL-NEXT: and w0, w8, w9 1004; GISEL-NEXT: ret 1005entry: 1006 %c0 = icmp ugt i32 %s0, %s1 1007 %c1 = icmp ne i32 %s2, %s3 1008 %a = and i1 %c0, %c1 1009 %z = zext i1 %a to i32 1010 ret i32 %z 1011} 1012 1013define i32 @and_ugt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1014; SDISEL-LABEL: and_ugt_ult: 1015; SDISEL: // %bb.0: // %entry 1016; SDISEL-NEXT: cmp w0, w1 1017; SDISEL-NEXT: ccmp w2, w3, #2, hi 1018; SDISEL-NEXT: cset w0, lo 1019; SDISEL-NEXT: ret 1020; 1021; GISEL-LABEL: and_ugt_ult: 1022; GISEL: // %bb.0: // %entry 1023; GISEL-NEXT: cmp w0, w1 1024; GISEL-NEXT: cset w8, hi 1025; GISEL-NEXT: cmp w2, w3 1026; GISEL-NEXT: cset w9, lo 1027; GISEL-NEXT: and w0, w8, w9 1028; GISEL-NEXT: ret 1029entry: 1030 %c0 = icmp ugt i32 %s0, %s1 1031 %c1 = icmp ult i32 %s2, %s3 1032 %a = and i1 %c0, %c1 1033 %z = zext i1 %a to i32 1034 ret i32 %z 1035} 1036 1037define i32 @and_ugt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1038; SDISEL-LABEL: and_ugt_ule: 1039; SDISEL: // %bb.0: // %entry 1040; SDISEL-NEXT: cmp w0, w1 1041; SDISEL-NEXT: ccmp w2, w3, #2, hi 1042; SDISEL-NEXT: cset w0, ls 1043; SDISEL-NEXT: ret 1044; 1045; GISEL-LABEL: and_ugt_ule: 1046; GISEL: // %bb.0: // %entry 1047; GISEL-NEXT: cmp w0, w1 1048; GISEL-NEXT: cset w8, hi 1049; GISEL-NEXT: cmp w2, w3 1050; GISEL-NEXT: cset w9, ls 1051; GISEL-NEXT: and w0, w8, w9 1052; GISEL-NEXT: ret 1053entry: 1054 %c0 = icmp ugt i32 %s0, %s1 1055 %c1 = icmp ule i32 %s2, %s3 1056 %a = and i1 %c0, %c1 1057 %z = zext i1 %a to i32 1058 ret i32 %z 1059} 1060 1061define i32 @and_ugt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1062; SDISEL-LABEL: and_ugt_ugt: 1063; SDISEL: // %bb.0: // %entry 1064; SDISEL-NEXT: cmp w0, w1 1065; SDISEL-NEXT: ccmp w2, w3, #0, hi 1066; SDISEL-NEXT: cset w0, hi 1067; SDISEL-NEXT: ret 1068; 1069; GISEL-LABEL: and_ugt_ugt: 1070; GISEL: // %bb.0: // %entry 1071; GISEL-NEXT: cmp w0, w1 1072; GISEL-NEXT: cset w8, hi 1073; GISEL-NEXT: cmp w2, w3 1074; GISEL-NEXT: cset w9, hi 1075; GISEL-NEXT: and w0, w8, w9 1076; GISEL-NEXT: ret 1077entry: 1078 %c0 = icmp ugt i32 %s0, %s1 1079 %c1 = icmp ugt i32 %s2, %s3 1080 %a = and i1 %c0, %c1 1081 %z = zext i1 %a to i32 1082 ret i32 %z 1083} 1084 1085define i32 @and_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1086; SDISEL-LABEL: and_ugt_uge: 1087; SDISEL: // %bb.0: // %entry 1088; SDISEL-NEXT: cmp w0, w1 1089; SDISEL-NEXT: ccmp w2, w3, #0, hi 1090; SDISEL-NEXT: cset w0, hs 1091; SDISEL-NEXT: ret 1092; 1093; GISEL-LABEL: and_ugt_uge: 1094; GISEL: // %bb.0: // %entry 1095; GISEL-NEXT: cmp w0, w1 1096; GISEL-NEXT: cset w8, hi 1097; GISEL-NEXT: cmp w2, w3 1098; GISEL-NEXT: cset w9, hs 1099; GISEL-NEXT: and w0, w8, w9 1100; GISEL-NEXT: ret 1101entry: 1102 %c0 = icmp ugt i32 %s0, %s1 1103 %c1 = icmp uge i32 %s2, %s3 1104 %a = and i1 %c0, %c1 1105 %z = zext i1 %a to i32 1106 ret i32 %z 1107} 1108 1109define i32 @and_ugt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1110; SDISEL-LABEL: and_ugt_slt: 1111; SDISEL: // %bb.0: // %entry 1112; SDISEL-NEXT: cmp w0, w1 1113; SDISEL-NEXT: ccmp w2, w3, #0, hi 1114; SDISEL-NEXT: cset w0, lt 1115; SDISEL-NEXT: ret 1116; 1117; GISEL-LABEL: and_ugt_slt: 1118; GISEL: // %bb.0: // %entry 1119; GISEL-NEXT: cmp w0, w1 1120; GISEL-NEXT: cset w8, hi 1121; GISEL-NEXT: cmp w2, w3 1122; GISEL-NEXT: cset w9, lt 1123; GISEL-NEXT: and w0, w8, w9 1124; GISEL-NEXT: ret 1125entry: 1126 %c0 = icmp ugt i32 %s0, %s1 1127 %c1 = icmp slt i32 %s2, %s3 1128 %a = and i1 %c0, %c1 1129 %z = zext i1 %a to i32 1130 ret i32 %z 1131} 1132 1133define i32 @and_ugt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1134; SDISEL-LABEL: and_ugt_sle: 1135; SDISEL: // %bb.0: // %entry 1136; SDISEL-NEXT: cmp w0, w1 1137; SDISEL-NEXT: ccmp w2, w3, #0, hi 1138; SDISEL-NEXT: cset w0, le 1139; SDISEL-NEXT: ret 1140; 1141; GISEL-LABEL: and_ugt_sle: 1142; GISEL: // %bb.0: // %entry 1143; GISEL-NEXT: cmp w0, w1 1144; GISEL-NEXT: cset w8, hi 1145; GISEL-NEXT: cmp w2, w3 1146; GISEL-NEXT: cset w9, le 1147; GISEL-NEXT: and w0, w8, w9 1148; GISEL-NEXT: ret 1149entry: 1150 %c0 = icmp ugt i32 %s0, %s1 1151 %c1 = icmp sle i32 %s2, %s3 1152 %a = and i1 %c0, %c1 1153 %z = zext i1 %a to i32 1154 ret i32 %z 1155} 1156 1157define i32 @and_ugt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1158; SDISEL-LABEL: and_ugt_sgt: 1159; SDISEL: // %bb.0: // %entry 1160; SDISEL-NEXT: cmp w0, w1 1161; SDISEL-NEXT: ccmp w2, w3, #4, hi 1162; SDISEL-NEXT: cset w0, gt 1163; SDISEL-NEXT: ret 1164; 1165; GISEL-LABEL: and_ugt_sgt: 1166; GISEL: // %bb.0: // %entry 1167; GISEL-NEXT: cmp w0, w1 1168; GISEL-NEXT: cset w8, hi 1169; GISEL-NEXT: cmp w2, w3 1170; GISEL-NEXT: cset w9, gt 1171; GISEL-NEXT: and w0, w8, w9 1172; GISEL-NEXT: ret 1173entry: 1174 %c0 = icmp ugt i32 %s0, %s1 1175 %c1 = icmp sgt i32 %s2, %s3 1176 %a = and i1 %c0, %c1 1177 %z = zext i1 %a to i32 1178 ret i32 %z 1179} 1180 1181define i32 @and_ugt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1182; SDISEL-LABEL: and_ugt_sge: 1183; SDISEL: // %bb.0: // %entry 1184; SDISEL-NEXT: cmp w0, w1 1185; SDISEL-NEXT: ccmp w2, w3, #8, hi 1186; SDISEL-NEXT: cset w0, ge 1187; SDISEL-NEXT: ret 1188; 1189; GISEL-LABEL: and_ugt_sge: 1190; GISEL: // %bb.0: // %entry 1191; GISEL-NEXT: cmp w0, w1 1192; GISEL-NEXT: cset w8, hi 1193; GISEL-NEXT: cmp w2, w3 1194; GISEL-NEXT: cset w9, ge 1195; GISEL-NEXT: and w0, w8, w9 1196; GISEL-NEXT: ret 1197entry: 1198 %c0 = icmp ugt i32 %s0, %s1 1199 %c1 = icmp sge i32 %s2, %s3 1200 %a = and i1 %c0, %c1 1201 %z = zext i1 %a to i32 1202 ret i32 %z 1203} 1204 1205define i32 @and_uge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1206; SDISEL-LABEL: and_uge_eq: 1207; SDISEL: // %bb.0: // %entry 1208; SDISEL-NEXT: cmp w0, w1 1209; SDISEL-NEXT: ccmp w2, w3, #0, hs 1210; SDISEL-NEXT: cset w0, eq 1211; SDISEL-NEXT: ret 1212; 1213; GISEL-LABEL: and_uge_eq: 1214; GISEL: // %bb.0: // %entry 1215; GISEL-NEXT: cmp w0, w1 1216; GISEL-NEXT: cset w8, hs 1217; GISEL-NEXT: cmp w2, w3 1218; GISEL-NEXT: cset w9, eq 1219; GISEL-NEXT: and w0, w8, w9 1220; GISEL-NEXT: ret 1221entry: 1222 %c0 = icmp uge i32 %s0, %s1 1223 %c1 = icmp eq i32 %s2, %s3 1224 %a = and i1 %c0, %c1 1225 %z = zext i1 %a to i32 1226 ret i32 %z 1227} 1228 1229define i32 @and_uge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1230; SDISEL-LABEL: and_uge_ne: 1231; SDISEL: // %bb.0: // %entry 1232; SDISEL-NEXT: cmp w0, w1 1233; SDISEL-NEXT: ccmp w2, w3, #4, hs 1234; SDISEL-NEXT: cset w0, ne 1235; SDISEL-NEXT: ret 1236; 1237; GISEL-LABEL: and_uge_ne: 1238; GISEL: // %bb.0: // %entry 1239; GISEL-NEXT: cmp w0, w1 1240; GISEL-NEXT: cset w8, hs 1241; GISEL-NEXT: cmp w2, w3 1242; GISEL-NEXT: cset w9, ne 1243; GISEL-NEXT: and w0, w8, w9 1244; GISEL-NEXT: ret 1245entry: 1246 %c0 = icmp uge i32 %s0, %s1 1247 %c1 = icmp ne i32 %s2, %s3 1248 %a = and i1 %c0, %c1 1249 %z = zext i1 %a to i32 1250 ret i32 %z 1251} 1252 1253define i32 @and_uge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1254; SDISEL-LABEL: and_uge_ult: 1255; SDISEL: // %bb.0: // %entry 1256; SDISEL-NEXT: cmp w0, w1 1257; SDISEL-NEXT: ccmp w2, w3, #2, hs 1258; SDISEL-NEXT: cset w0, lo 1259; SDISEL-NEXT: ret 1260; 1261; GISEL-LABEL: and_uge_ult: 1262; GISEL: // %bb.0: // %entry 1263; GISEL-NEXT: cmp w0, w1 1264; GISEL-NEXT: cset w8, hs 1265; GISEL-NEXT: cmp w2, w3 1266; GISEL-NEXT: cset w9, lo 1267; GISEL-NEXT: and w0, w8, w9 1268; GISEL-NEXT: ret 1269entry: 1270 %c0 = icmp uge i32 %s0, %s1 1271 %c1 = icmp ult i32 %s2, %s3 1272 %a = and i1 %c0, %c1 1273 %z = zext i1 %a to i32 1274 ret i32 %z 1275} 1276 1277define i32 @and_uge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1278; SDISEL-LABEL: and_uge_ule: 1279; SDISEL: // %bb.0: // %entry 1280; SDISEL-NEXT: cmp w0, w1 1281; SDISEL-NEXT: ccmp w2, w3, #2, hs 1282; SDISEL-NEXT: cset w0, ls 1283; SDISEL-NEXT: ret 1284; 1285; GISEL-LABEL: and_uge_ule: 1286; GISEL: // %bb.0: // %entry 1287; GISEL-NEXT: cmp w0, w1 1288; GISEL-NEXT: cset w8, hs 1289; GISEL-NEXT: cmp w2, w3 1290; GISEL-NEXT: cset w9, ls 1291; GISEL-NEXT: and w0, w8, w9 1292; GISEL-NEXT: ret 1293entry: 1294 %c0 = icmp uge i32 %s0, %s1 1295 %c1 = icmp ule i32 %s2, %s3 1296 %a = and i1 %c0, %c1 1297 %z = zext i1 %a to i32 1298 ret i32 %z 1299} 1300 1301define i32 @and_uge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1302; SDISEL-LABEL: and_uge_ugt: 1303; SDISEL: // %bb.0: // %entry 1304; SDISEL-NEXT: cmp w0, w1 1305; SDISEL-NEXT: ccmp w2, w3, #0, hs 1306; SDISEL-NEXT: cset w0, hi 1307; SDISEL-NEXT: ret 1308; 1309; GISEL-LABEL: and_uge_ugt: 1310; GISEL: // %bb.0: // %entry 1311; GISEL-NEXT: cmp w0, w1 1312; GISEL-NEXT: cset w8, hs 1313; GISEL-NEXT: cmp w2, w3 1314; GISEL-NEXT: cset w9, hi 1315; GISEL-NEXT: and w0, w8, w9 1316; GISEL-NEXT: ret 1317entry: 1318 %c0 = icmp uge i32 %s0, %s1 1319 %c1 = icmp ugt i32 %s2, %s3 1320 %a = and i1 %c0, %c1 1321 %z = zext i1 %a to i32 1322 ret i32 %z 1323} 1324 1325define i32 @and_uge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1326; SDISEL-LABEL: and_uge_uge: 1327; SDISEL: // %bb.0: // %entry 1328; SDISEL-NEXT: cmp w0, w1 1329; SDISEL-NEXT: ccmp w2, w3, #0, hs 1330; SDISEL-NEXT: cset w0, hs 1331; SDISEL-NEXT: ret 1332; 1333; GISEL-LABEL: and_uge_uge: 1334; GISEL: // %bb.0: // %entry 1335; GISEL-NEXT: cmp w0, w1 1336; GISEL-NEXT: cset w8, hs 1337; GISEL-NEXT: cmp w2, w3 1338; GISEL-NEXT: cset w9, hs 1339; GISEL-NEXT: and w0, w8, w9 1340; GISEL-NEXT: ret 1341entry: 1342 %c0 = icmp uge i32 %s0, %s1 1343 %c1 = icmp uge i32 %s2, %s3 1344 %a = and i1 %c0, %c1 1345 %z = zext i1 %a to i32 1346 ret i32 %z 1347} 1348 1349define i32 @and_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1350; SDISEL-LABEL: and_uge_slt: 1351; SDISEL: // %bb.0: // %entry 1352; SDISEL-NEXT: cmp w0, w1 1353; SDISEL-NEXT: ccmp w2, w3, #0, hs 1354; SDISEL-NEXT: cset w0, lt 1355; SDISEL-NEXT: ret 1356; 1357; GISEL-LABEL: and_uge_slt: 1358; GISEL: // %bb.0: // %entry 1359; GISEL-NEXT: cmp w0, w1 1360; GISEL-NEXT: cset w8, hs 1361; GISEL-NEXT: cmp w2, w3 1362; GISEL-NEXT: cset w9, lt 1363; GISEL-NEXT: and w0, w8, w9 1364; GISEL-NEXT: ret 1365entry: 1366 %c0 = icmp uge i32 %s0, %s1 1367 %c1 = icmp slt i32 %s2, %s3 1368 %a = and i1 %c0, %c1 1369 %z = zext i1 %a to i32 1370 ret i32 %z 1371} 1372 1373define i32 @and_uge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1374; SDISEL-LABEL: and_uge_sle: 1375; SDISEL: // %bb.0: // %entry 1376; SDISEL-NEXT: cmp w0, w1 1377; SDISEL-NEXT: ccmp w2, w3, #0, hs 1378; SDISEL-NEXT: cset w0, le 1379; SDISEL-NEXT: ret 1380; 1381; GISEL-LABEL: and_uge_sle: 1382; GISEL: // %bb.0: // %entry 1383; GISEL-NEXT: cmp w0, w1 1384; GISEL-NEXT: cset w8, hs 1385; GISEL-NEXT: cmp w2, w3 1386; GISEL-NEXT: cset w9, le 1387; GISEL-NEXT: and w0, w8, w9 1388; GISEL-NEXT: ret 1389entry: 1390 %c0 = icmp uge i32 %s0, %s1 1391 %c1 = icmp sle i32 %s2, %s3 1392 %a = and i1 %c0, %c1 1393 %z = zext i1 %a to i32 1394 ret i32 %z 1395} 1396 1397define i32 @and_uge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1398; SDISEL-LABEL: and_uge_sgt: 1399; SDISEL: // %bb.0: // %entry 1400; SDISEL-NEXT: cmp w0, w1 1401; SDISEL-NEXT: ccmp w2, w3, #4, hs 1402; SDISEL-NEXT: cset w0, gt 1403; SDISEL-NEXT: ret 1404; 1405; GISEL-LABEL: and_uge_sgt: 1406; GISEL: // %bb.0: // %entry 1407; GISEL-NEXT: cmp w0, w1 1408; GISEL-NEXT: cset w8, hs 1409; GISEL-NEXT: cmp w2, w3 1410; GISEL-NEXT: cset w9, gt 1411; GISEL-NEXT: and w0, w8, w9 1412; GISEL-NEXT: ret 1413entry: 1414 %c0 = icmp uge i32 %s0, %s1 1415 %c1 = icmp sgt i32 %s2, %s3 1416 %a = and i1 %c0, %c1 1417 %z = zext i1 %a to i32 1418 ret i32 %z 1419} 1420 1421define i32 @and_uge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1422; SDISEL-LABEL: and_uge_sge: 1423; SDISEL: // %bb.0: // %entry 1424; SDISEL-NEXT: cmp w0, w1 1425; SDISEL-NEXT: ccmp w2, w3, #8, hs 1426; SDISEL-NEXT: cset w0, ge 1427; SDISEL-NEXT: ret 1428; 1429; GISEL-LABEL: and_uge_sge: 1430; GISEL: // %bb.0: // %entry 1431; GISEL-NEXT: cmp w0, w1 1432; GISEL-NEXT: cset w8, hs 1433; GISEL-NEXT: cmp w2, w3 1434; GISEL-NEXT: cset w9, ge 1435; GISEL-NEXT: and w0, w8, w9 1436; GISEL-NEXT: ret 1437entry: 1438 %c0 = icmp uge i32 %s0, %s1 1439 %c1 = icmp sge i32 %s2, %s3 1440 %a = and i1 %c0, %c1 1441 %z = zext i1 %a to i32 1442 ret i32 %z 1443} 1444 1445define i32 @and_slt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1446; SDISEL-LABEL: and_slt_eq: 1447; SDISEL: // %bb.0: // %entry 1448; SDISEL-NEXT: cmp w0, w1 1449; SDISEL-NEXT: ccmp w2, w3, #0, lt 1450; SDISEL-NEXT: cset w0, eq 1451; SDISEL-NEXT: ret 1452; 1453; GISEL-LABEL: and_slt_eq: 1454; GISEL: // %bb.0: // %entry 1455; GISEL-NEXT: cmp w0, w1 1456; GISEL-NEXT: cset w8, lt 1457; GISEL-NEXT: cmp w2, w3 1458; GISEL-NEXT: cset w9, eq 1459; GISEL-NEXT: and w0, w8, w9 1460; GISEL-NEXT: ret 1461entry: 1462 %c0 = icmp slt i32 %s0, %s1 1463 %c1 = icmp eq i32 %s2, %s3 1464 %a = and i1 %c0, %c1 1465 %z = zext i1 %a to i32 1466 ret i32 %z 1467} 1468 1469define i32 @and_slt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1470; SDISEL-LABEL: and_slt_ne: 1471; SDISEL: // %bb.0: // %entry 1472; SDISEL-NEXT: cmp w0, w1 1473; SDISEL-NEXT: ccmp w2, w3, #4, lt 1474; SDISEL-NEXT: cset w0, ne 1475; SDISEL-NEXT: ret 1476; 1477; GISEL-LABEL: and_slt_ne: 1478; GISEL: // %bb.0: // %entry 1479; GISEL-NEXT: cmp w0, w1 1480; GISEL-NEXT: cset w8, lt 1481; GISEL-NEXT: cmp w2, w3 1482; GISEL-NEXT: cset w9, ne 1483; GISEL-NEXT: and w0, w8, w9 1484; GISEL-NEXT: ret 1485entry: 1486 %c0 = icmp slt i32 %s0, %s1 1487 %c1 = icmp ne i32 %s2, %s3 1488 %a = and i1 %c0, %c1 1489 %z = zext i1 %a to i32 1490 ret i32 %z 1491} 1492 1493define i32 @and_slt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1494; SDISEL-LABEL: and_slt_ult: 1495; SDISEL: // %bb.0: // %entry 1496; SDISEL-NEXT: cmp w0, w1 1497; SDISEL-NEXT: ccmp w2, w3, #2, lt 1498; SDISEL-NEXT: cset w0, lo 1499; SDISEL-NEXT: ret 1500; 1501; GISEL-LABEL: and_slt_ult: 1502; GISEL: // %bb.0: // %entry 1503; GISEL-NEXT: cmp w0, w1 1504; GISEL-NEXT: cset w8, lt 1505; GISEL-NEXT: cmp w2, w3 1506; GISEL-NEXT: cset w9, lo 1507; GISEL-NEXT: and w0, w8, w9 1508; GISEL-NEXT: ret 1509entry: 1510 %c0 = icmp slt i32 %s0, %s1 1511 %c1 = icmp ult i32 %s2, %s3 1512 %a = and i1 %c0, %c1 1513 %z = zext i1 %a to i32 1514 ret i32 %z 1515} 1516 1517define i32 @and_slt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1518; SDISEL-LABEL: and_slt_ule: 1519; SDISEL: // %bb.0: // %entry 1520; SDISEL-NEXT: cmp w0, w1 1521; SDISEL-NEXT: ccmp w2, w3, #2, lt 1522; SDISEL-NEXT: cset w0, ls 1523; SDISEL-NEXT: ret 1524; 1525; GISEL-LABEL: and_slt_ule: 1526; GISEL: // %bb.0: // %entry 1527; GISEL-NEXT: cmp w0, w1 1528; GISEL-NEXT: cset w8, lt 1529; GISEL-NEXT: cmp w2, w3 1530; GISEL-NEXT: cset w9, ls 1531; GISEL-NEXT: and w0, w8, w9 1532; GISEL-NEXT: ret 1533entry: 1534 %c0 = icmp slt i32 %s0, %s1 1535 %c1 = icmp ule i32 %s2, %s3 1536 %a = and i1 %c0, %c1 1537 %z = zext i1 %a to i32 1538 ret i32 %z 1539} 1540 1541define i32 @and_slt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1542; SDISEL-LABEL: and_slt_ugt: 1543; SDISEL: // %bb.0: // %entry 1544; SDISEL-NEXT: cmp w0, w1 1545; SDISEL-NEXT: ccmp w2, w3, #0, lt 1546; SDISEL-NEXT: cset w0, hi 1547; SDISEL-NEXT: ret 1548; 1549; GISEL-LABEL: and_slt_ugt: 1550; GISEL: // %bb.0: // %entry 1551; GISEL-NEXT: cmp w0, w1 1552; GISEL-NEXT: cset w8, lt 1553; GISEL-NEXT: cmp w2, w3 1554; GISEL-NEXT: cset w9, hi 1555; GISEL-NEXT: and w0, w8, w9 1556; GISEL-NEXT: ret 1557entry: 1558 %c0 = icmp slt i32 %s0, %s1 1559 %c1 = icmp ugt i32 %s2, %s3 1560 %a = and i1 %c0, %c1 1561 %z = zext i1 %a to i32 1562 ret i32 %z 1563} 1564 1565define i32 @and_slt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1566; SDISEL-LABEL: and_slt_uge: 1567; SDISEL: // %bb.0: // %entry 1568; SDISEL-NEXT: cmp w0, w1 1569; SDISEL-NEXT: ccmp w2, w3, #0, lt 1570; SDISEL-NEXT: cset w0, hs 1571; SDISEL-NEXT: ret 1572; 1573; GISEL-LABEL: and_slt_uge: 1574; GISEL: // %bb.0: // %entry 1575; GISEL-NEXT: cmp w0, w1 1576; GISEL-NEXT: cset w8, lt 1577; GISEL-NEXT: cmp w2, w3 1578; GISEL-NEXT: cset w9, hs 1579; GISEL-NEXT: and w0, w8, w9 1580; GISEL-NEXT: ret 1581entry: 1582 %c0 = icmp slt i32 %s0, %s1 1583 %c1 = icmp uge i32 %s2, %s3 1584 %a = and i1 %c0, %c1 1585 %z = zext i1 %a to i32 1586 ret i32 %z 1587} 1588 1589define i32 @and_slt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1590; SDISEL-LABEL: and_slt_slt: 1591; SDISEL: // %bb.0: // %entry 1592; SDISEL-NEXT: cmp w0, w1 1593; SDISEL-NEXT: ccmp w2, w3, #0, lt 1594; SDISEL-NEXT: cset w0, lt 1595; SDISEL-NEXT: ret 1596; 1597; GISEL-LABEL: and_slt_slt: 1598; GISEL: // %bb.0: // %entry 1599; GISEL-NEXT: cmp w0, w1 1600; GISEL-NEXT: cset w8, lt 1601; GISEL-NEXT: cmp w2, w3 1602; GISEL-NEXT: cset w9, lt 1603; GISEL-NEXT: and w0, w8, w9 1604; GISEL-NEXT: ret 1605entry: 1606 %c0 = icmp slt i32 %s0, %s1 1607 %c1 = icmp slt i32 %s2, %s3 1608 %a = and i1 %c0, %c1 1609 %z = zext i1 %a to i32 1610 ret i32 %z 1611} 1612 1613define i32 @and_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1614; SDISEL-LABEL: and_slt_sle: 1615; SDISEL: // %bb.0: // %entry 1616; SDISEL-NEXT: cmp w0, w1 1617; SDISEL-NEXT: ccmp w2, w3, #0, lt 1618; SDISEL-NEXT: cset w0, le 1619; SDISEL-NEXT: ret 1620; 1621; GISEL-LABEL: and_slt_sle: 1622; GISEL: // %bb.0: // %entry 1623; GISEL-NEXT: cmp w0, w1 1624; GISEL-NEXT: cset w8, lt 1625; GISEL-NEXT: cmp w2, w3 1626; GISEL-NEXT: cset w9, le 1627; GISEL-NEXT: and w0, w8, w9 1628; GISEL-NEXT: ret 1629entry: 1630 %c0 = icmp slt i32 %s0, %s1 1631 %c1 = icmp sle i32 %s2, %s3 1632 %a = and i1 %c0, %c1 1633 %z = zext i1 %a to i32 1634 ret i32 %z 1635} 1636 1637define i32 @and_slt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1638; SDISEL-LABEL: and_slt_sgt: 1639; SDISEL: // %bb.0: // %entry 1640; SDISEL-NEXT: cmp w0, w1 1641; SDISEL-NEXT: ccmp w2, w3, #4, lt 1642; SDISEL-NEXT: cset w0, gt 1643; SDISEL-NEXT: ret 1644; 1645; GISEL-LABEL: and_slt_sgt: 1646; GISEL: // %bb.0: // %entry 1647; GISEL-NEXT: cmp w0, w1 1648; GISEL-NEXT: cset w8, lt 1649; GISEL-NEXT: cmp w2, w3 1650; GISEL-NEXT: cset w9, gt 1651; GISEL-NEXT: and w0, w8, w9 1652; GISEL-NEXT: ret 1653entry: 1654 %c0 = icmp slt i32 %s0, %s1 1655 %c1 = icmp sgt i32 %s2, %s3 1656 %a = and i1 %c0, %c1 1657 %z = zext i1 %a to i32 1658 ret i32 %z 1659} 1660 1661define i32 @and_slt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1662; SDISEL-LABEL: and_slt_sge: 1663; SDISEL: // %bb.0: // %entry 1664; SDISEL-NEXT: cmp w0, w1 1665; SDISEL-NEXT: ccmp w2, w3, #8, lt 1666; SDISEL-NEXT: cset w0, ge 1667; SDISEL-NEXT: ret 1668; 1669; GISEL-LABEL: and_slt_sge: 1670; GISEL: // %bb.0: // %entry 1671; GISEL-NEXT: cmp w0, w1 1672; GISEL-NEXT: cset w8, lt 1673; GISEL-NEXT: cmp w2, w3 1674; GISEL-NEXT: cset w9, ge 1675; GISEL-NEXT: and w0, w8, w9 1676; GISEL-NEXT: ret 1677entry: 1678 %c0 = icmp slt i32 %s0, %s1 1679 %c1 = icmp sge i32 %s2, %s3 1680 %a = and i1 %c0, %c1 1681 %z = zext i1 %a to i32 1682 ret i32 %z 1683} 1684 1685define i32 @and_sle_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1686; SDISEL-LABEL: and_sle_eq: 1687; SDISEL: // %bb.0: // %entry 1688; SDISEL-NEXT: cmp w0, w1 1689; SDISEL-NEXT: ccmp w2, w3, #0, le 1690; SDISEL-NEXT: cset w0, eq 1691; SDISEL-NEXT: ret 1692; 1693; GISEL-LABEL: and_sle_eq: 1694; GISEL: // %bb.0: // %entry 1695; GISEL-NEXT: cmp w0, w1 1696; GISEL-NEXT: cset w8, le 1697; GISEL-NEXT: cmp w2, w3 1698; GISEL-NEXT: cset w9, eq 1699; GISEL-NEXT: and w0, w8, w9 1700; GISEL-NEXT: ret 1701entry: 1702 %c0 = icmp sle i32 %s0, %s1 1703 %c1 = icmp eq i32 %s2, %s3 1704 %a = and i1 %c0, %c1 1705 %z = zext i1 %a to i32 1706 ret i32 %z 1707} 1708 1709define i32 @and_sle_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1710; SDISEL-LABEL: and_sle_ne: 1711; SDISEL: // %bb.0: // %entry 1712; SDISEL-NEXT: cmp w0, w1 1713; SDISEL-NEXT: ccmp w2, w3, #4, le 1714; SDISEL-NEXT: cset w0, ne 1715; SDISEL-NEXT: ret 1716; 1717; GISEL-LABEL: and_sle_ne: 1718; GISEL: // %bb.0: // %entry 1719; GISEL-NEXT: cmp w0, w1 1720; GISEL-NEXT: cset w8, le 1721; GISEL-NEXT: cmp w2, w3 1722; GISEL-NEXT: cset w9, ne 1723; GISEL-NEXT: and w0, w8, w9 1724; GISEL-NEXT: ret 1725entry: 1726 %c0 = icmp sle i32 %s0, %s1 1727 %c1 = icmp ne i32 %s2, %s3 1728 %a = and i1 %c0, %c1 1729 %z = zext i1 %a to i32 1730 ret i32 %z 1731} 1732 1733define i32 @and_sle_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1734; SDISEL-LABEL: and_sle_ult: 1735; SDISEL: // %bb.0: // %entry 1736; SDISEL-NEXT: cmp w0, w1 1737; SDISEL-NEXT: ccmp w2, w3, #2, le 1738; SDISEL-NEXT: cset w0, lo 1739; SDISEL-NEXT: ret 1740; 1741; GISEL-LABEL: and_sle_ult: 1742; GISEL: // %bb.0: // %entry 1743; GISEL-NEXT: cmp w0, w1 1744; GISEL-NEXT: cset w8, le 1745; GISEL-NEXT: cmp w2, w3 1746; GISEL-NEXT: cset w9, lo 1747; GISEL-NEXT: and w0, w8, w9 1748; GISEL-NEXT: ret 1749entry: 1750 %c0 = icmp sle i32 %s0, %s1 1751 %c1 = icmp ult i32 %s2, %s3 1752 %a = and i1 %c0, %c1 1753 %z = zext i1 %a to i32 1754 ret i32 %z 1755} 1756 1757define i32 @and_sle_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1758; SDISEL-LABEL: and_sle_ule: 1759; SDISEL: // %bb.0: // %entry 1760; SDISEL-NEXT: cmp w0, w1 1761; SDISEL-NEXT: ccmp w2, w3, #2, le 1762; SDISEL-NEXT: cset w0, ls 1763; SDISEL-NEXT: ret 1764; 1765; GISEL-LABEL: and_sle_ule: 1766; GISEL: // %bb.0: // %entry 1767; GISEL-NEXT: cmp w0, w1 1768; GISEL-NEXT: cset w8, le 1769; GISEL-NEXT: cmp w2, w3 1770; GISEL-NEXT: cset w9, ls 1771; GISEL-NEXT: and w0, w8, w9 1772; GISEL-NEXT: ret 1773entry: 1774 %c0 = icmp sle i32 %s0, %s1 1775 %c1 = icmp ule i32 %s2, %s3 1776 %a = and i1 %c0, %c1 1777 %z = zext i1 %a to i32 1778 ret i32 %z 1779} 1780 1781define i32 @and_sle_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1782; SDISEL-LABEL: and_sle_ugt: 1783; SDISEL: // %bb.0: // %entry 1784; SDISEL-NEXT: cmp w0, w1 1785; SDISEL-NEXT: ccmp w2, w3, #0, le 1786; SDISEL-NEXT: cset w0, hi 1787; SDISEL-NEXT: ret 1788; 1789; GISEL-LABEL: and_sle_ugt: 1790; GISEL: // %bb.0: // %entry 1791; GISEL-NEXT: cmp w0, w1 1792; GISEL-NEXT: cset w8, le 1793; GISEL-NEXT: cmp w2, w3 1794; GISEL-NEXT: cset w9, hi 1795; GISEL-NEXT: and w0, w8, w9 1796; GISEL-NEXT: ret 1797entry: 1798 %c0 = icmp sle i32 %s0, %s1 1799 %c1 = icmp ugt i32 %s2, %s3 1800 %a = and i1 %c0, %c1 1801 %z = zext i1 %a to i32 1802 ret i32 %z 1803} 1804 1805define i32 @and_sle_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1806; SDISEL-LABEL: and_sle_uge: 1807; SDISEL: // %bb.0: // %entry 1808; SDISEL-NEXT: cmp w0, w1 1809; SDISEL-NEXT: ccmp w2, w3, #0, le 1810; SDISEL-NEXT: cset w0, hs 1811; SDISEL-NEXT: ret 1812; 1813; GISEL-LABEL: and_sle_uge: 1814; GISEL: // %bb.0: // %entry 1815; GISEL-NEXT: cmp w0, w1 1816; GISEL-NEXT: cset w8, le 1817; GISEL-NEXT: cmp w2, w3 1818; GISEL-NEXT: cset w9, hs 1819; GISEL-NEXT: and w0, w8, w9 1820; GISEL-NEXT: ret 1821entry: 1822 %c0 = icmp sle i32 %s0, %s1 1823 %c1 = icmp uge i32 %s2, %s3 1824 %a = and i1 %c0, %c1 1825 %z = zext i1 %a to i32 1826 ret i32 %z 1827} 1828 1829define i32 @and_sle_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1830; SDISEL-LABEL: and_sle_slt: 1831; SDISEL: // %bb.0: // %entry 1832; SDISEL-NEXT: cmp w0, w1 1833; SDISEL-NEXT: ccmp w2, w3, #0, le 1834; SDISEL-NEXT: cset w0, lt 1835; SDISEL-NEXT: ret 1836; 1837; GISEL-LABEL: and_sle_slt: 1838; GISEL: // %bb.0: // %entry 1839; GISEL-NEXT: cmp w0, w1 1840; GISEL-NEXT: cset w8, le 1841; GISEL-NEXT: cmp w2, w3 1842; GISEL-NEXT: cset w9, lt 1843; GISEL-NEXT: and w0, w8, w9 1844; GISEL-NEXT: ret 1845entry: 1846 %c0 = icmp sle i32 %s0, %s1 1847 %c1 = icmp slt i32 %s2, %s3 1848 %a = and i1 %c0, %c1 1849 %z = zext i1 %a to i32 1850 ret i32 %z 1851} 1852 1853define i32 @and_sle_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1854; SDISEL-LABEL: and_sle_sle: 1855; SDISEL: // %bb.0: // %entry 1856; SDISEL-NEXT: cmp w0, w1 1857; SDISEL-NEXT: ccmp w2, w3, #0, le 1858; SDISEL-NEXT: cset w0, le 1859; SDISEL-NEXT: ret 1860; 1861; GISEL-LABEL: and_sle_sle: 1862; GISEL: // %bb.0: // %entry 1863; GISEL-NEXT: cmp w0, w1 1864; GISEL-NEXT: cset w8, le 1865; GISEL-NEXT: cmp w2, w3 1866; GISEL-NEXT: cset w9, le 1867; GISEL-NEXT: and w0, w8, w9 1868; GISEL-NEXT: ret 1869entry: 1870 %c0 = icmp sle i32 %s0, %s1 1871 %c1 = icmp sle i32 %s2, %s3 1872 %a = and i1 %c0, %c1 1873 %z = zext i1 %a to i32 1874 ret i32 %z 1875} 1876 1877define i32 @and_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1878; SDISEL-LABEL: and_sle_sgt: 1879; SDISEL: // %bb.0: // %entry 1880; SDISEL-NEXT: cmp w0, w1 1881; SDISEL-NEXT: ccmp w2, w3, #4, le 1882; SDISEL-NEXT: cset w0, gt 1883; SDISEL-NEXT: ret 1884; 1885; GISEL-LABEL: and_sle_sgt: 1886; GISEL: // %bb.0: // %entry 1887; GISEL-NEXT: cmp w0, w1 1888; GISEL-NEXT: cset w8, le 1889; GISEL-NEXT: cmp w2, w3 1890; GISEL-NEXT: cset w9, gt 1891; GISEL-NEXT: and w0, w8, w9 1892; GISEL-NEXT: ret 1893entry: 1894 %c0 = icmp sle i32 %s0, %s1 1895 %c1 = icmp sgt i32 %s2, %s3 1896 %a = and i1 %c0, %c1 1897 %z = zext i1 %a to i32 1898 ret i32 %z 1899} 1900 1901define i32 @and_sle_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1902; SDISEL-LABEL: and_sle_sge: 1903; SDISEL: // %bb.0: // %entry 1904; SDISEL-NEXT: cmp w0, w1 1905; SDISEL-NEXT: ccmp w2, w3, #8, le 1906; SDISEL-NEXT: cset w0, ge 1907; SDISEL-NEXT: ret 1908; 1909; GISEL-LABEL: and_sle_sge: 1910; GISEL: // %bb.0: // %entry 1911; GISEL-NEXT: cmp w0, w1 1912; GISEL-NEXT: cset w8, le 1913; GISEL-NEXT: cmp w2, w3 1914; GISEL-NEXT: cset w9, ge 1915; GISEL-NEXT: and w0, w8, w9 1916; GISEL-NEXT: ret 1917entry: 1918 %c0 = icmp sle i32 %s0, %s1 1919 %c1 = icmp sge i32 %s2, %s3 1920 %a = and i1 %c0, %c1 1921 %z = zext i1 %a to i32 1922 ret i32 %z 1923} 1924 1925define i32 @and_sgt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1926; SDISEL-LABEL: and_sgt_eq: 1927; SDISEL: // %bb.0: // %entry 1928; SDISEL-NEXT: cmp w0, w1 1929; SDISEL-NEXT: ccmp w2, w3, #0, gt 1930; SDISEL-NEXT: cset w0, eq 1931; SDISEL-NEXT: ret 1932; 1933; GISEL-LABEL: and_sgt_eq: 1934; GISEL: // %bb.0: // %entry 1935; GISEL-NEXT: cmp w0, w1 1936; GISEL-NEXT: cset w8, gt 1937; GISEL-NEXT: cmp w2, w3 1938; GISEL-NEXT: cset w9, eq 1939; GISEL-NEXT: and w0, w8, w9 1940; GISEL-NEXT: ret 1941entry: 1942 %c0 = icmp sgt i32 %s0, %s1 1943 %c1 = icmp eq i32 %s2, %s3 1944 %a = and i1 %c0, %c1 1945 %z = zext i1 %a to i32 1946 ret i32 %z 1947} 1948 1949define i32 @and_sgt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1950; SDISEL-LABEL: and_sgt_ne: 1951; SDISEL: // %bb.0: // %entry 1952; SDISEL-NEXT: cmp w0, w1 1953; SDISEL-NEXT: ccmp w2, w3, #4, gt 1954; SDISEL-NEXT: cset w0, ne 1955; SDISEL-NEXT: ret 1956; 1957; GISEL-LABEL: and_sgt_ne: 1958; GISEL: // %bb.0: // %entry 1959; GISEL-NEXT: cmp w0, w1 1960; GISEL-NEXT: cset w8, gt 1961; GISEL-NEXT: cmp w2, w3 1962; GISEL-NEXT: cset w9, ne 1963; GISEL-NEXT: and w0, w8, w9 1964; GISEL-NEXT: ret 1965entry: 1966 %c0 = icmp sgt i32 %s0, %s1 1967 %c1 = icmp ne i32 %s2, %s3 1968 %a = and i1 %c0, %c1 1969 %z = zext i1 %a to i32 1970 ret i32 %z 1971} 1972 1973define i32 @and_sgt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1974; SDISEL-LABEL: and_sgt_ult: 1975; SDISEL: // %bb.0: // %entry 1976; SDISEL-NEXT: cmp w0, w1 1977; SDISEL-NEXT: ccmp w2, w3, #2, gt 1978; SDISEL-NEXT: cset w0, lo 1979; SDISEL-NEXT: ret 1980; 1981; GISEL-LABEL: and_sgt_ult: 1982; GISEL: // %bb.0: // %entry 1983; GISEL-NEXT: cmp w0, w1 1984; GISEL-NEXT: cset w8, gt 1985; GISEL-NEXT: cmp w2, w3 1986; GISEL-NEXT: cset w9, lo 1987; GISEL-NEXT: and w0, w8, w9 1988; GISEL-NEXT: ret 1989entry: 1990 %c0 = icmp sgt i32 %s0, %s1 1991 %c1 = icmp ult i32 %s2, %s3 1992 %a = and i1 %c0, %c1 1993 %z = zext i1 %a to i32 1994 ret i32 %z 1995} 1996 1997define i32 @and_sgt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 1998; SDISEL-LABEL: and_sgt_ule: 1999; SDISEL: // %bb.0: // %entry 2000; SDISEL-NEXT: cmp w0, w1 2001; SDISEL-NEXT: ccmp w2, w3, #2, gt 2002; SDISEL-NEXT: cset w0, ls 2003; SDISEL-NEXT: ret 2004; 2005; GISEL-LABEL: and_sgt_ule: 2006; GISEL: // %bb.0: // %entry 2007; GISEL-NEXT: cmp w0, w1 2008; GISEL-NEXT: cset w8, gt 2009; GISEL-NEXT: cmp w2, w3 2010; GISEL-NEXT: cset w9, ls 2011; GISEL-NEXT: and w0, w8, w9 2012; GISEL-NEXT: ret 2013entry: 2014 %c0 = icmp sgt i32 %s0, %s1 2015 %c1 = icmp ule i32 %s2, %s3 2016 %a = and i1 %c0, %c1 2017 %z = zext i1 %a to i32 2018 ret i32 %z 2019} 2020 2021define i32 @and_sgt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2022; SDISEL-LABEL: and_sgt_ugt: 2023; SDISEL: // %bb.0: // %entry 2024; SDISEL-NEXT: cmp w0, w1 2025; SDISEL-NEXT: ccmp w2, w3, #0, gt 2026; SDISEL-NEXT: cset w0, hi 2027; SDISEL-NEXT: ret 2028; 2029; GISEL-LABEL: and_sgt_ugt: 2030; GISEL: // %bb.0: // %entry 2031; GISEL-NEXT: cmp w0, w1 2032; GISEL-NEXT: cset w8, gt 2033; GISEL-NEXT: cmp w2, w3 2034; GISEL-NEXT: cset w9, hi 2035; GISEL-NEXT: and w0, w8, w9 2036; GISEL-NEXT: ret 2037entry: 2038 %c0 = icmp sgt i32 %s0, %s1 2039 %c1 = icmp ugt i32 %s2, %s3 2040 %a = and i1 %c0, %c1 2041 %z = zext i1 %a to i32 2042 ret i32 %z 2043} 2044 2045define i32 @and_sgt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2046; SDISEL-LABEL: and_sgt_uge: 2047; SDISEL: // %bb.0: // %entry 2048; SDISEL-NEXT: cmp w0, w1 2049; SDISEL-NEXT: ccmp w2, w3, #0, gt 2050; SDISEL-NEXT: cset w0, hs 2051; SDISEL-NEXT: ret 2052; 2053; GISEL-LABEL: and_sgt_uge: 2054; GISEL: // %bb.0: // %entry 2055; GISEL-NEXT: cmp w0, w1 2056; GISEL-NEXT: cset w8, gt 2057; GISEL-NEXT: cmp w2, w3 2058; GISEL-NEXT: cset w9, hs 2059; GISEL-NEXT: and w0, w8, w9 2060; GISEL-NEXT: ret 2061entry: 2062 %c0 = icmp sgt i32 %s0, %s1 2063 %c1 = icmp uge i32 %s2, %s3 2064 %a = and i1 %c0, %c1 2065 %z = zext i1 %a to i32 2066 ret i32 %z 2067} 2068 2069define i32 @and_sgt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2070; SDISEL-LABEL: and_sgt_slt: 2071; SDISEL: // %bb.0: // %entry 2072; SDISEL-NEXT: cmp w0, w1 2073; SDISEL-NEXT: ccmp w2, w3, #0, gt 2074; SDISEL-NEXT: cset w0, lt 2075; SDISEL-NEXT: ret 2076; 2077; GISEL-LABEL: and_sgt_slt: 2078; GISEL: // %bb.0: // %entry 2079; GISEL-NEXT: cmp w0, w1 2080; GISEL-NEXT: cset w8, gt 2081; GISEL-NEXT: cmp w2, w3 2082; GISEL-NEXT: cset w9, lt 2083; GISEL-NEXT: and w0, w8, w9 2084; GISEL-NEXT: ret 2085entry: 2086 %c0 = icmp sgt i32 %s0, %s1 2087 %c1 = icmp slt i32 %s2, %s3 2088 %a = and i1 %c0, %c1 2089 %z = zext i1 %a to i32 2090 ret i32 %z 2091} 2092 2093define i32 @and_sgt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2094; SDISEL-LABEL: and_sgt_sle: 2095; SDISEL: // %bb.0: // %entry 2096; SDISEL-NEXT: cmp w0, w1 2097; SDISEL-NEXT: ccmp w2, w3, #0, gt 2098; SDISEL-NEXT: cset w0, le 2099; SDISEL-NEXT: ret 2100; 2101; GISEL-LABEL: and_sgt_sle: 2102; GISEL: // %bb.0: // %entry 2103; GISEL-NEXT: cmp w0, w1 2104; GISEL-NEXT: cset w8, gt 2105; GISEL-NEXT: cmp w2, w3 2106; GISEL-NEXT: cset w9, le 2107; GISEL-NEXT: and w0, w8, w9 2108; GISEL-NEXT: ret 2109entry: 2110 %c0 = icmp sgt i32 %s0, %s1 2111 %c1 = icmp sle i32 %s2, %s3 2112 %a = and i1 %c0, %c1 2113 %z = zext i1 %a to i32 2114 ret i32 %z 2115} 2116 2117define i32 @and_sgt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2118; SDISEL-LABEL: and_sgt_sgt: 2119; SDISEL: // %bb.0: // %entry 2120; SDISEL-NEXT: cmp w0, w1 2121; SDISEL-NEXT: ccmp w2, w3, #4, gt 2122; SDISEL-NEXT: cset w0, gt 2123; SDISEL-NEXT: ret 2124; 2125; GISEL-LABEL: and_sgt_sgt: 2126; GISEL: // %bb.0: // %entry 2127; GISEL-NEXT: cmp w0, w1 2128; GISEL-NEXT: cset w8, gt 2129; GISEL-NEXT: cmp w2, w3 2130; GISEL-NEXT: cset w9, gt 2131; GISEL-NEXT: and w0, w8, w9 2132; GISEL-NEXT: ret 2133entry: 2134 %c0 = icmp sgt i32 %s0, %s1 2135 %c1 = icmp sgt i32 %s2, %s3 2136 %a = and i1 %c0, %c1 2137 %z = zext i1 %a to i32 2138 ret i32 %z 2139} 2140 2141define i32 @and_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2142; SDISEL-LABEL: and_sgt_sge: 2143; SDISEL: // %bb.0: // %entry 2144; SDISEL-NEXT: cmp w0, w1 2145; SDISEL-NEXT: ccmp w2, w3, #8, gt 2146; SDISEL-NEXT: cset w0, ge 2147; SDISEL-NEXT: ret 2148; 2149; GISEL-LABEL: and_sgt_sge: 2150; GISEL: // %bb.0: // %entry 2151; GISEL-NEXT: cmp w0, w1 2152; GISEL-NEXT: cset w8, gt 2153; GISEL-NEXT: cmp w2, w3 2154; GISEL-NEXT: cset w9, ge 2155; GISEL-NEXT: and w0, w8, w9 2156; GISEL-NEXT: ret 2157entry: 2158 %c0 = icmp sgt i32 %s0, %s1 2159 %c1 = icmp sge i32 %s2, %s3 2160 %a = and i1 %c0, %c1 2161 %z = zext i1 %a to i32 2162 ret i32 %z 2163} 2164 2165define i32 @and_sge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2166; SDISEL-LABEL: and_sge_eq: 2167; SDISEL: // %bb.0: // %entry 2168; SDISEL-NEXT: cmp w0, w1 2169; SDISEL-NEXT: ccmp w2, w3, #0, ge 2170; SDISEL-NEXT: cset w0, eq 2171; SDISEL-NEXT: ret 2172; 2173; GISEL-LABEL: and_sge_eq: 2174; GISEL: // %bb.0: // %entry 2175; GISEL-NEXT: cmp w0, w1 2176; GISEL-NEXT: cset w8, ge 2177; GISEL-NEXT: cmp w2, w3 2178; GISEL-NEXT: cset w9, eq 2179; GISEL-NEXT: and w0, w8, w9 2180; GISEL-NEXT: ret 2181entry: 2182 %c0 = icmp sge i32 %s0, %s1 2183 %c1 = icmp eq i32 %s2, %s3 2184 %a = and i1 %c0, %c1 2185 %z = zext i1 %a to i32 2186 ret i32 %z 2187} 2188 2189define i32 @and_sge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2190; SDISEL-LABEL: and_sge_ne: 2191; SDISEL: // %bb.0: // %entry 2192; SDISEL-NEXT: cmp w0, w1 2193; SDISEL-NEXT: ccmp w2, w3, #4, ge 2194; SDISEL-NEXT: cset w0, ne 2195; SDISEL-NEXT: ret 2196; 2197; GISEL-LABEL: and_sge_ne: 2198; GISEL: // %bb.0: // %entry 2199; GISEL-NEXT: cmp w0, w1 2200; GISEL-NEXT: cset w8, ge 2201; GISEL-NEXT: cmp w2, w3 2202; GISEL-NEXT: cset w9, ne 2203; GISEL-NEXT: and w0, w8, w9 2204; GISEL-NEXT: ret 2205entry: 2206 %c0 = icmp sge i32 %s0, %s1 2207 %c1 = icmp ne i32 %s2, %s3 2208 %a = and i1 %c0, %c1 2209 %z = zext i1 %a to i32 2210 ret i32 %z 2211} 2212 2213define i32 @and_sge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2214; SDISEL-LABEL: and_sge_ult: 2215; SDISEL: // %bb.0: // %entry 2216; SDISEL-NEXT: cmp w0, w1 2217; SDISEL-NEXT: ccmp w2, w3, #2, ge 2218; SDISEL-NEXT: cset w0, lo 2219; SDISEL-NEXT: ret 2220; 2221; GISEL-LABEL: and_sge_ult: 2222; GISEL: // %bb.0: // %entry 2223; GISEL-NEXT: cmp w0, w1 2224; GISEL-NEXT: cset w8, ge 2225; GISEL-NEXT: cmp w2, w3 2226; GISEL-NEXT: cset w9, lo 2227; GISEL-NEXT: and w0, w8, w9 2228; GISEL-NEXT: ret 2229entry: 2230 %c0 = icmp sge i32 %s0, %s1 2231 %c1 = icmp ult i32 %s2, %s3 2232 %a = and i1 %c0, %c1 2233 %z = zext i1 %a to i32 2234 ret i32 %z 2235} 2236 2237define i32 @and_sge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2238; SDISEL-LABEL: and_sge_ule: 2239; SDISEL: // %bb.0: // %entry 2240; SDISEL-NEXT: cmp w0, w1 2241; SDISEL-NEXT: ccmp w2, w3, #2, ge 2242; SDISEL-NEXT: cset w0, ls 2243; SDISEL-NEXT: ret 2244; 2245; GISEL-LABEL: and_sge_ule: 2246; GISEL: // %bb.0: // %entry 2247; GISEL-NEXT: cmp w0, w1 2248; GISEL-NEXT: cset w8, ge 2249; GISEL-NEXT: cmp w2, w3 2250; GISEL-NEXT: cset w9, ls 2251; GISEL-NEXT: and w0, w8, w9 2252; GISEL-NEXT: ret 2253entry: 2254 %c0 = icmp sge i32 %s0, %s1 2255 %c1 = icmp ule i32 %s2, %s3 2256 %a = and i1 %c0, %c1 2257 %z = zext i1 %a to i32 2258 ret i32 %z 2259} 2260 2261define i32 @and_sge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2262; SDISEL-LABEL: and_sge_ugt: 2263; SDISEL: // %bb.0: // %entry 2264; SDISEL-NEXT: cmp w0, w1 2265; SDISEL-NEXT: ccmp w2, w3, #0, ge 2266; SDISEL-NEXT: cset w0, hi 2267; SDISEL-NEXT: ret 2268; 2269; GISEL-LABEL: and_sge_ugt: 2270; GISEL: // %bb.0: // %entry 2271; GISEL-NEXT: cmp w0, w1 2272; GISEL-NEXT: cset w8, ge 2273; GISEL-NEXT: cmp w2, w3 2274; GISEL-NEXT: cset w9, hi 2275; GISEL-NEXT: and w0, w8, w9 2276; GISEL-NEXT: ret 2277entry: 2278 %c0 = icmp sge i32 %s0, %s1 2279 %c1 = icmp ugt i32 %s2, %s3 2280 %a = and i1 %c0, %c1 2281 %z = zext i1 %a to i32 2282 ret i32 %z 2283} 2284 2285define i32 @and_sge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2286; SDISEL-LABEL: and_sge_uge: 2287; SDISEL: // %bb.0: // %entry 2288; SDISEL-NEXT: cmp w0, w1 2289; SDISEL-NEXT: ccmp w2, w3, #0, ge 2290; SDISEL-NEXT: cset w0, hs 2291; SDISEL-NEXT: ret 2292; 2293; GISEL-LABEL: and_sge_uge: 2294; GISEL: // %bb.0: // %entry 2295; GISEL-NEXT: cmp w0, w1 2296; GISEL-NEXT: cset w8, ge 2297; GISEL-NEXT: cmp w2, w3 2298; GISEL-NEXT: cset w9, hs 2299; GISEL-NEXT: and w0, w8, w9 2300; GISEL-NEXT: ret 2301entry: 2302 %c0 = icmp sge i32 %s0, %s1 2303 %c1 = icmp uge i32 %s2, %s3 2304 %a = and i1 %c0, %c1 2305 %z = zext i1 %a to i32 2306 ret i32 %z 2307} 2308 2309define i32 @and_sge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2310; SDISEL-LABEL: and_sge_slt: 2311; SDISEL: // %bb.0: // %entry 2312; SDISEL-NEXT: cmp w0, w1 2313; SDISEL-NEXT: ccmp w2, w3, #0, ge 2314; SDISEL-NEXT: cset w0, lt 2315; SDISEL-NEXT: ret 2316; 2317; GISEL-LABEL: and_sge_slt: 2318; GISEL: // %bb.0: // %entry 2319; GISEL-NEXT: cmp w0, w1 2320; GISEL-NEXT: cset w8, ge 2321; GISEL-NEXT: cmp w2, w3 2322; GISEL-NEXT: cset w9, lt 2323; GISEL-NEXT: and w0, w8, w9 2324; GISEL-NEXT: ret 2325entry: 2326 %c0 = icmp sge i32 %s0, %s1 2327 %c1 = icmp slt i32 %s2, %s3 2328 %a = and i1 %c0, %c1 2329 %z = zext i1 %a to i32 2330 ret i32 %z 2331} 2332 2333define i32 @and_sge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2334; SDISEL-LABEL: and_sge_sle: 2335; SDISEL: // %bb.0: // %entry 2336; SDISEL-NEXT: cmp w0, w1 2337; SDISEL-NEXT: ccmp w2, w3, #0, ge 2338; SDISEL-NEXT: cset w0, le 2339; SDISEL-NEXT: ret 2340; 2341; GISEL-LABEL: and_sge_sle: 2342; GISEL: // %bb.0: // %entry 2343; GISEL-NEXT: cmp w0, w1 2344; GISEL-NEXT: cset w8, ge 2345; GISEL-NEXT: cmp w2, w3 2346; GISEL-NEXT: cset w9, le 2347; GISEL-NEXT: and w0, w8, w9 2348; GISEL-NEXT: ret 2349entry: 2350 %c0 = icmp sge i32 %s0, %s1 2351 %c1 = icmp sle i32 %s2, %s3 2352 %a = and i1 %c0, %c1 2353 %z = zext i1 %a to i32 2354 ret i32 %z 2355} 2356 2357define i32 @and_sge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2358; SDISEL-LABEL: and_sge_sgt: 2359; SDISEL: // %bb.0: // %entry 2360; SDISEL-NEXT: cmp w0, w1 2361; SDISEL-NEXT: ccmp w2, w3, #4, ge 2362; SDISEL-NEXT: cset w0, gt 2363; SDISEL-NEXT: ret 2364; 2365; GISEL-LABEL: and_sge_sgt: 2366; GISEL: // %bb.0: // %entry 2367; GISEL-NEXT: cmp w0, w1 2368; GISEL-NEXT: cset w8, ge 2369; GISEL-NEXT: cmp w2, w3 2370; GISEL-NEXT: cset w9, gt 2371; GISEL-NEXT: and w0, w8, w9 2372; GISEL-NEXT: ret 2373entry: 2374 %c0 = icmp sge i32 %s0, %s1 2375 %c1 = icmp sgt i32 %s2, %s3 2376 %a = and i1 %c0, %c1 2377 %z = zext i1 %a to i32 2378 ret i32 %z 2379} 2380 2381define i32 @and_sge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) { 2382; SDISEL-LABEL: and_sge_sge: 2383; SDISEL: // %bb.0: // %entry 2384; SDISEL-NEXT: cmp w0, w1 2385; SDISEL-NEXT: ccmp w2, w3, #8, ge 2386; SDISEL-NEXT: cset w0, ge 2387; SDISEL-NEXT: ret 2388; 2389; GISEL-LABEL: and_sge_sge: 2390; GISEL: // %bb.0: // %entry 2391; GISEL-NEXT: cmp w0, w1 2392; GISEL-NEXT: cset w8, ge 2393; GISEL-NEXT: cmp w2, w3 2394; GISEL-NEXT: cset w9, ge 2395; GISEL-NEXT: and w0, w8, w9 2396; GISEL-NEXT: ret 2397entry: 2398 %c0 = icmp sge i32 %s0, %s1 2399 %c1 = icmp sge i32 %s2, %s3 2400 %a = and i1 %c0, %c1 2401 %z = zext i1 %a to i32 2402 ret i32 %z 2403} 2404 2405define i32 @cmp_to_ands1(i32 %num) { 2406; SDISEL-LABEL: cmp_to_ands1: 2407; SDISEL: // %bb.0: 2408; SDISEL-NEXT: and w8, w0, #0xff 2409; SDISEL-NEXT: tst w0, #0xfe 2410; SDISEL-NEXT: csel w0, w8, wzr, ne 2411; SDISEL-NEXT: ret 2412; 2413; GISEL-LABEL: cmp_to_ands1: 2414; GISEL: // %bb.0: 2415; GISEL-NEXT: and w8, w0, #0xff 2416; GISEL-NEXT: cmp w8, #1 2417; GISEL-NEXT: csel w0, w8, wzr, hi 2418; GISEL-NEXT: ret 2419 %and = and i32 %num, 255 2420 %cmp = icmp ugt i32 %and, 1 2421 %r = select i1 %cmp, i32 %and, i32 0 2422 ret i32 %r 2423} 2424 2425define i32 @cmp_to_ands2(i32 %num) { 2426; SDISEL-LABEL: cmp_to_ands2: 2427; SDISEL: // %bb.0: 2428; SDISEL-NEXT: and w8, w0, #0xfe 2429; SDISEL-NEXT: tst w0, #0xc0 2430; SDISEL-NEXT: csel w0, w8, wzr, ne 2431; SDISEL-NEXT: ret 2432; 2433; GISEL-LABEL: cmp_to_ands2: 2434; GISEL: // %bb.0: 2435; GISEL-NEXT: and w8, w0, #0xfe 2436; GISEL-NEXT: cmp w8, #63 2437; GISEL-NEXT: csel w0, w8, wzr, hi 2438; GISEL-NEXT: ret 2439 %and = and i32 %num, 254 2440 %cmp = icmp ugt i32 %and, 63 2441 %r = select i1 %cmp, i32 %and, i32 0 2442 ret i32 %r 2443} 2444 2445define i32 @cmp_to_ands3(i32 %num, i32 %a) { 2446; SDISEL-LABEL: cmp_to_ands3: 2447; SDISEL: // %bb.0: 2448; SDISEL-NEXT: tst w0, #0x10 2449; SDISEL-NEXT: csel w0, w1, wzr, ne 2450; SDISEL-NEXT: ret 2451; 2452; GISEL-LABEL: cmp_to_ands3: 2453; GISEL: // %bb.0: 2454; GISEL-NEXT: mov w8, #23 // =0x17 2455; GISEL-NEXT: and w8, w0, w8 2456; GISEL-NEXT: cmp w8, #7 2457; GISEL-NEXT: csel w0, w1, wzr, hi 2458; GISEL-NEXT: ret 2459 %and = and i32 %num, 23 2460 %cmp = icmp ugt i32 %and, 7 2461 %r = select i1 %cmp, i32 %a, i32 0 2462 ret i32 %r 2463} 2464 2465define i32 @cmp_to_ands4(i32 %num, i32 %a) { 2466; SDISEL-LABEL: cmp_to_ands4: 2467; SDISEL: // %bb.0: 2468; SDISEL-NEXT: and w8, w0, #0x30 2469; SDISEL-NEXT: tst w0, #0x20 2470; SDISEL-NEXT: csel w0, w8, w1, eq 2471; SDISEL-NEXT: ret 2472; 2473; GISEL-LABEL: cmp_to_ands4: 2474; GISEL: // %bb.0: 2475; GISEL-NEXT: and w8, w0, #0x30 2476; GISEL-NEXT: cmp w8, #31 2477; GISEL-NEXT: csel w0, w8, w1, ls 2478; GISEL-NEXT: ret 2479 %and = and i32 %num, 48 2480 %cmp = icmp ule i32 %and, 31 2481 %r = select i1 %cmp, i32 %and, i32 %a 2482 ret i32 %r 2483} 2484 2485define i32 @cmp_to_ands5(i32 %num, i32 %a) { 2486; SDISEL-LABEL: cmp_to_ands5: 2487; SDISEL: // %bb.0: 2488; SDISEL-NEXT: and w8, w0, #0xf8 2489; SDISEL-NEXT: tst w0, #0xc0 2490; SDISEL-NEXT: csel w0, w8, w1, eq 2491; SDISEL-NEXT: ret 2492; 2493; GISEL-LABEL: cmp_to_ands5: 2494; GISEL: // %bb.0: 2495; GISEL-NEXT: and w8, w0, #0xf8 2496; GISEL-NEXT: cmp w8, #64 2497; GISEL-NEXT: csel w0, w8, w1, lo 2498; GISEL-NEXT: ret 2499 %and = and i32 %num, 248 2500 %cmp = icmp ult i32 %and, 64 2501 %r = select i1 %cmp, i32 %and, i32 %a 2502 ret i32 %r 2503} 2504 2505define i32 @cmp_to_ands6(i32 %num) { 2506; SDISEL-LABEL: cmp_to_ands6: 2507; SDISEL: // %bb.0: 2508; SDISEL-NEXT: and w8, w0, #0xfe 2509; SDISEL-NEXT: tst w0, #0xf0 2510; SDISEL-NEXT: csel w0, w8, wzr, ne 2511; SDISEL-NEXT: ret 2512; 2513; GISEL-LABEL: cmp_to_ands6: 2514; GISEL: // %bb.0: 2515; GISEL-NEXT: and w8, w0, #0xfe 2516; GISEL-NEXT: cmp w8, #16 2517; GISEL-NEXT: csel w0, w8, wzr, hs 2518; GISEL-NEXT: ret 2519 %and = and i32 %num, 254 2520 %cmp = icmp uge i32 %and, 16 2521 %r = select i1 %cmp, i32 %and, i32 0 2522 ret i32 %r 2523} 2524 2525define i1 @and_fcmp(float %0, float %1) { 2526; SDISEL-LABEL: and_fcmp: 2527; SDISEL: // %bb.0: 2528; SDISEL-NEXT: fcmp s1, s1 2529; SDISEL-NEXT: fccmp s0, s0, #0, vs 2530; SDISEL-NEXT: cset w0, vs 2531; SDISEL-NEXT: ret 2532; 2533; GISEL-LABEL: and_fcmp: 2534; GISEL: // %bb.0: 2535; GISEL-NEXT: fcmp s0, #0.0 2536; GISEL-NEXT: cset w8, vs 2537; GISEL-NEXT: fcmp s1, #0.0 2538; GISEL-NEXT: cset w9, vs 2539; GISEL-NEXT: and w0, w8, w9 2540; GISEL-NEXT: ret 2541 2542 %3 = fcmp uno float %0, 0.000000e+00 2543 %4 = fcmp uno float %1, 0.000000e+00 2544 %5 = and i1 %3, %4 2545 ret i1 %5 2546} 2547 2548 2549;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 2550; CHECK: {{.*}} 2551