xref: /llvm-project/llvm/test/CodeGen/AArch64/addp-shuffle.ll (revision 61510b51c33464a6bc15e4cf5b1ee07e2e0ec1c9) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
4
5define <4 x i32> @deinterleave_shuffle_v8i32(<8 x i32> %a) {
6; CHECK-LABEL: deinterleave_shuffle_v8i32:
7; CHECK:       // %bb.0:
8; CHECK-NEXT:    addp v0.4s, v0.4s, v1.4s
9; CHECK-NEXT:    ret
10  %r0 = shufflevector <8 x i32> %a, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
11  %r1 = shufflevector <8 x i32> %a, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
12  %o = add <4 x i32> %r0, %r1
13  ret <4 x i32> %o
14}
15
16define <4 x i32> @deinterleave_shuffle_v8i32_c(<8 x i32> %a) {
17; CHECK-LABEL: deinterleave_shuffle_v8i32_c:
18; CHECK:       // %bb.0:
19; CHECK-NEXT:    addp v0.4s, v0.4s, v1.4s
20; CHECK-NEXT:    ret
21  %r0 = shufflevector <8 x i32> %a, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
22  %r1 = shufflevector <8 x i32> %a, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
23  %o = add <4 x i32> %r1, %r0
24  ret <4 x i32> %o
25}
26
27define <2 x i32> @deinterleave_shuffle_v4i32(<4 x i32> %a) {
28; CHECK-LABEL: deinterleave_shuffle_v4i32:
29; CHECK:       // %bb.0:
30; CHECK-NEXT:    addp v0.4s, v0.4s, v0.4s
31; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
32; CHECK-NEXT:    ret
33  %r0 = shufflevector <4 x i32> %a, <4 x i32> poison, <2 x i32> <i32 0, i32 2>
34  %r1 = shufflevector <4 x i32> %a, <4 x i32> poison, <2 x i32> <i32 1, i32 3>
35  %o = add <2 x i32> %r0, %r1
36  ret <2 x i32> %o
37}
38
39define <8 x i16> @deinterleave_shuffle_v16i16(<16 x i16> %a) {
40; CHECK-LABEL: deinterleave_shuffle_v16i16:
41; CHECK:       // %bb.0:
42; CHECK-NEXT:    addp v0.8h, v0.8h, v1.8h
43; CHECK-NEXT:    ret
44  %r0 = shufflevector <16 x i16> %a, <16 x i16> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
45  %r1 = shufflevector <16 x i16> %a, <16 x i16> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
46  %o = add <8 x i16> %r0, %r1
47  ret <8 x i16> %o
48}
49
50define <4 x i16> @deinterleave_shuffle_v8i16(<8 x i16> %a) {
51; CHECK-LABEL: deinterleave_shuffle_v8i16:
52; CHECK:       // %bb.0:
53; CHECK-NEXT:    addp v0.8h, v0.8h, v0.8h
54; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
55; CHECK-NEXT:    ret
56  %r0 = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
57  %r1 = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
58  %o = add <4 x i16> %r0, %r1
59  ret <4 x i16> %o
60}
61
62define <16 x i8> @deinterleave_shuffle_v32i8(<32 x i8> %a) {
63; CHECK-LABEL: deinterleave_shuffle_v32i8:
64; CHECK:       // %bb.0:
65; CHECK-NEXT:    addp v0.16b, v0.16b, v1.16b
66; CHECK-NEXT:    ret
67  %r0 = shufflevector <32 x i8> %a, <32 x i8> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
68  %r1 = shufflevector <32 x i8> %a, <32 x i8> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
69  %o = add <16 x i8> %r0, %r1
70  ret <16 x i8> %o
71}
72
73define <8 x i8> @deinterleave_shuffle_v16i8(<16 x i8> %a) {
74; CHECK-LABEL: deinterleave_shuffle_v16i8:
75; CHECK:       // %bb.0:
76; CHECK-NEXT:    addp v0.16b, v0.16b, v0.16b
77; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
78; CHECK-NEXT:    ret
79  %r0 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
80  %r1 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
81  %o = add <8 x i8> %r0, %r1
82  ret <8 x i8> %o
83}
84
85define <4 x i64> @deinterleave_shuffle_v8i64(<8 x i64> %a) {
86; CHECK-LABEL: deinterleave_shuffle_v8i64:
87; CHECK:       // %bb.0:
88; CHECK-NEXT:    addp v2.2d, v2.2d, v3.2d
89; CHECK-NEXT:    addp v0.2d, v0.2d, v1.2d
90; CHECK-NEXT:    mov v1.16b, v2.16b
91; CHECK-NEXT:    ret
92  %r0 = shufflevector <8 x i64> %a, <8 x i64> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
93  %r1 = shufflevector <8 x i64> %a, <8 x i64> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
94  %o = add <4 x i64> %r0, %r1
95  ret <4 x i64> %o
96}
97
98define <4 x float> @deinterleave_shuffle_v8f32(<8 x float> %a) {
99; CHECK-LABEL: deinterleave_shuffle_v8f32:
100; CHECK:       // %bb.0:
101; CHECK-NEXT:    faddp v0.4s, v0.4s, v1.4s
102; CHECK-NEXT:    ret
103  %r0 = shufflevector <8 x float> %a, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
104  %r1 = shufflevector <8 x float> %a, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
105  %o = fadd <4 x float> %r0, %r1
106  ret <4 x float> %o
107}
108
109define <4 x float> @deinterleave_shuffle_v8f32_c(<8 x float> %a) {
110; CHECK-LABEL: deinterleave_shuffle_v8f32_c:
111; CHECK:       // %bb.0:
112; CHECK-NEXT:    faddp v0.4s, v0.4s, v1.4s
113; CHECK-NEXT:    ret
114  %r0 = shufflevector <8 x float> %a, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
115  %r1 = shufflevector <8 x float> %a, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
116  %o = fadd <4 x float> %r1, %r0
117  ret <4 x float> %o
118}
119
120define <8 x half> @deinterleave_shuffle_v16f16(<16 x half> %a) {
121; CHECK-NOFP16-LABEL: deinterleave_shuffle_v16f16:
122; CHECK-NOFP16:       // %bb.0:
123; CHECK-NOFP16-NEXT:    uzp1 v2.8h, v0.8h, v1.8h
124; CHECK-NOFP16-NEXT:    uzp2 v0.8h, v0.8h, v1.8h
125; CHECK-NOFP16-NEXT:    fcvtl v1.4s, v0.4h
126; CHECK-NOFP16-NEXT:    fcvtl v3.4s, v2.4h
127; CHECK-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h
128; CHECK-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h
129; CHECK-NOFP16-NEXT:    fadd v1.4s, v3.4s, v1.4s
130; CHECK-NOFP16-NEXT:    fadd v2.4s, v2.4s, v0.4s
131; CHECK-NOFP16-NEXT:    fcvtn v0.4h, v1.4s
132; CHECK-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s
133; CHECK-NOFP16-NEXT:    ret
134;
135; CHECK-FP16-LABEL: deinterleave_shuffle_v16f16:
136; CHECK-FP16:       // %bb.0:
137; CHECK-FP16-NEXT:    faddp v0.8h, v0.8h, v1.8h
138; CHECK-FP16-NEXT:    ret
139  %r0 = shufflevector <16 x half> %a, <16 x half> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
140  %r1 = shufflevector <16 x half> %a, <16 x half> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
141  %o = fadd <8 x half> %r0, %r1
142  ret <8 x half> %o
143}
144
145define <4 x double> @deinterleave_shuffle_v8f64(<8 x double> %a) {
146; CHECK-LABEL: deinterleave_shuffle_v8f64:
147; CHECK:       // %bb.0:
148; CHECK-NEXT:    faddp v2.2d, v2.2d, v3.2d
149; CHECK-NEXT:    faddp v0.2d, v0.2d, v1.2d
150; CHECK-NEXT:    mov v1.16b, v2.16b
151; CHECK-NEXT:    ret
152  %r0 = shufflevector <8 x double> %a, <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
153  %r1 = shufflevector <8 x double> %a, <8 x double> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
154  %o = fadd <4 x double> %r0, %r1
155  ret <4 x double> %o
156}
157
158define <4 x i32> @udot(<4 x i32> %z, <16 x i8> %a, <16 x i8> %b) {
159; CHECK-LABEL: udot:
160; CHECK:       // %bb.0:
161; CHECK-NEXT:    umull v3.8h, v1.8b, v2.8b
162; CHECK-NEXT:    umull2 v1.8h, v1.16b, v2.16b
163; CHECK-NEXT:    ushll2 v2.4s, v3.8h, #0
164; CHECK-NEXT:    ushll v3.4s, v3.4h, #0
165; CHECK-NEXT:    ushll2 v4.4s, v1.8h, #0
166; CHECK-NEXT:    ushll v1.4s, v1.4h, #0
167; CHECK-NEXT:    addp v2.4s, v3.4s, v2.4s
168; CHECK-NEXT:    addp v1.4s, v1.4s, v4.4s
169; CHECK-NEXT:    addp v1.4s, v2.4s, v1.4s
170; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
171; CHECK-NEXT:    ret
172  %za = zext <16 x i8> %a to <16 x i32>
173  %zb = zext <16 x i8> %b to <16 x i32>
174  %m = mul <16 x i32> %za, %zb
175  %r0 = shufflevector <16 x i32> %m, <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
176  %r1 = shufflevector <16 x i32> %m, <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
177  %m2 = add <8 x i32> %r0, %r1
178  %s0 = shufflevector <8 x i32> %m2, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
179  %s1 = shufflevector <8 x i32> %m2, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
180  %o = add <4 x i32> %s0, %s1
181  %n = add <4 x i32> %z, %o
182  ret <4 x i32> %n
183}
184
185define <4 x i32> @sdot(<4 x i32> %z, <16 x i8> %a, <16 x i8> %b) {
186; CHECK-LABEL: sdot:
187; CHECK:       // %bb.0:
188; CHECK-NEXT:    smull v3.8h, v1.8b, v2.8b
189; CHECK-NEXT:    smull2 v1.8h, v1.16b, v2.16b
190; CHECK-NEXT:    sshll2 v2.4s, v3.8h, #0
191; CHECK-NEXT:    sshll v3.4s, v3.4h, #0
192; CHECK-NEXT:    sshll2 v4.4s, v1.8h, #0
193; CHECK-NEXT:    sshll v1.4s, v1.4h, #0
194; CHECK-NEXT:    addp v2.4s, v3.4s, v2.4s
195; CHECK-NEXT:    addp v1.4s, v1.4s, v4.4s
196; CHECK-NEXT:    addp v1.4s, v2.4s, v1.4s
197; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
198; CHECK-NEXT:    ret
199  %za = sext <16 x i8> %a to <16 x i32>
200  %zb = sext <16 x i8> %b to <16 x i32>
201  %m = mul <16 x i32> %za, %zb
202  %r0 = shufflevector <16 x i32> %m, <16 x i32> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
203  %r1 = shufflevector <16 x i32> %m, <16 x i32> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
204  %m2 = add <8 x i32> %r0, %r1
205  %s0 = shufflevector <8 x i32> %m2, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
206  %s1 = shufflevector <8 x i32> %m2, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
207  %o = add <4 x i32> %s0, %s1
208  %n = add <4 x i32> %z, %o
209  ret <4 x i32> %n
210}
211