xref: /llvm-project/llvm/test/CodeGen/AArch64/add-negative.ll (revision 55311801f06d33a71deae80209dd5640d5e7463e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s
3
4define <8 x i16> @add_to_sub(<8 x i16> %0, <8 x i16> %1) {
5; CHECK-LABEL: add_to_sub:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    adrp x8, .LCPI0_0
8; CHECK-NEXT:    ldr q2, [x8, :lo12:.LCPI0_0]
9; CHECK-NEXT:    cmhi v0.8h, v2.8h, v0.8h
10; CHECK-NEXT:    cmhi v1.8h, v2.8h, v1.8h
11; CHECK-NEXT:    sub v0.8h, v0.8h, v1.8h
12; CHECK-NEXT:    ret
13  %3 = icmp ult <8 x i16> %0, <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>
14  %4 = sext <8 x i1> %3 to <8 x i16>
15  %5 = icmp ult <8 x i16> %1, <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>
16  %6 = zext <8 x i1> %5 to <8 x i16>
17  %7 = add nsw <8 x i16> %6, %4
18  ret <8 x i16> %7
19}
20