xref: /llvm-project/llvm/test/CodeGen/AArch64/add-i256.ll (revision 1ee315ae7964c8433b772e0b5d667834994ba753)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=neoverse-n1 < %s | FileCheck %s
3target triple = "aarch64-linux-unknown"
4
5define void @add_i256(i64 %x0, i64 %x1, i64 %x2, i64 %x3, i64 %y1, i64 %y2, i64 %y3, ptr %store_addr_ptr) {
6; CHECK-LABEL: add_i256:
7; CHECK:       // %bb.0: // %entry
8; CHECK-NEXT:    adds x8, x0, #1
9; CHECK-NEXT:    adcs x9, x1, x4
10; CHECK-NEXT:    stp x8, x9, [x7]
11; CHECK-NEXT:    adcs x8, x2, x5
12; CHECK-NEXT:    adc x9, x3, x6
13; CHECK-NEXT:    stp x8, x9, [x7, #16]
14; CHECK-NEXT:    ret
15entry:
16  ; Build x_256 = x0 | x1 << 64 | x2 << 128 | x3 << 192
17  %temp = zext i64 %x0 to i256
18  %temp57 = zext i64 %x1 to i256
19  %temp58 = zext i64 %x2 to i256
20  %temp59 = zext i64 %x3 to i256
21  %temp_shifted = shl i256 %temp, 0
22  %temp_shifted60 = shl i256 %temp57, 64
23  %temp_shifted61 = shl i256 %temp58, 128
24  %temp_shifted62 = shl i256 %temp59, 192
25  %x = or i256 %temp_shifted, %temp_shifted60
26  %x63 = or i256 %x, %temp_shifted61
27  %x_big = or i256 %x63, %temp_shifted62
28
29  ; Build y_256 = 1 | y1 << 64 | y2 << 128 | y3 << 192
30  %temp65 = zext i64 %y1 to i256
31  %temp66 = zext i64 %y2 to i256
32  %temp67 = zext i64 %y3 to i256
33  %temp_shifted68 = shl i256 %temp65, 64
34  %temp_shifted69 = shl i256 %temp66, 128
35  %temp_shifted70 = shl i256 %temp67, 192
36  %y = or i256 1, %temp_shifted68
37  %y71 = or i256 %y, %temp_shifted69
38  %y_big = or i256 %y71, %temp_shifted70
39
40  ; z_256 = x_256 + y_256
41  %z_256 = add i256 %x_big, %y_big
42
43  ; split z_256 into 4 64-bit registers
44  %split_64bits = lshr i256 %z_256, 0
45  %z0 = trunc i256 %split_64bits to i64
46  %split_64bits74 = lshr i256 %z_256, 64
47  %z1 = trunc i256 %split_64bits74 to i64
48  %split_64bits76 = lshr i256 %z_256, 128
49  %z2 = trunc i256 %split_64bits76 to i64
50  %split_64bits78 = lshr i256 %z_256, 192
51  %z3 = trunc i256 %split_64bits78 to i64
52
53  %outptr0 = bitcast ptr %store_addr_ptr to ptr
54  store i64 %z0, ptr %outptr0, align 4
55  %gep = getelementptr i8, ptr %store_addr_ptr, i64 8
56  %outptr1 = bitcast ptr %gep to ptr
57  store i64 %z1, ptr %outptr1, align 4
58  %store_addr_ofs = getelementptr i8, ptr %store_addr_ptr, i64 16
59  %outptr081 = bitcast ptr %store_addr_ofs to ptr
60  store i64 %z2, ptr %outptr081, align 4
61  %gep82 = getelementptr i8, ptr %store_addr_ofs, i64 8
62  %outptr183 = bitcast ptr %gep82 to ptr
63  store i64 %z3, ptr %outptr183, align 4
64  ret void
65}
66