xref: /llvm-project/llvm/test/CodeGen/AArch64/aarch64st1.mir (revision d4d3239d982e15e039d3958b4202b13203df26bd)
1# Check that it doesn't crash with unhandled opcode error, see pr52249
2# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass localstackalloc -o - %s | FileCheck %s
3# RUN: llc -mtriple=aarch64-none-linux-gnu -passes=localstackalloc -o - %s | FileCheck %s
4--- |
5
6  define void @test_st1_to_sp(<2 x i32> %a, <4 x i16> %b, <8 x i8> %c, <2 x i64> %d) gc "statepoint-example" { entry: ret void }
7
8...
9---
10# CHECK-LABEL: test_st1_to_sp
11name:            test_st1_to_sp
12alignment:       4
13exposesReturnsTwice: false
14legalized:       false
15regBankSelected: false
16selected:        false
17failedISel:      false
18tracksRegLiveness: true
19hasWinCFI:       false
20failsVerification: false
21registers:
22  - { id: 0, class: fpr64, preferred-register: '' }
23  - { id: 1, class: fpr64, preferred-register: '' }
24  - { id: 2, class: fpr64, preferred-register: '' }
25  - { id: 3, class: fpr128, preferred-register: '' }
26  - { id: 4, class: fpr64, preferred-register: '' }
27  - { id: 5, class: fpr128, preferred-register: '' }
28  - { id: 6, class: fpr128, preferred-register: '' }
29  - { id: 7, class: fpr64, preferred-register: '' }
30  - { id: 8, class: fpr128, preferred-register: '' }
31  - { id: 9, class: fpr128, preferred-register: '' }
32  - { id: 10, class: fpr64, preferred-register: '' }
33  - { id: 11, class: fpr128, preferred-register: '' }
34  - { id: 12, class: fpr128, preferred-register: '' }
35  - { id: 13, class: fpr128, preferred-register: '' }
36  - { id: 14, class: gpr32all, preferred-register: '' }
37  - { id: 15, class: gpr64all, preferred-register: '' }
38liveins:
39  - { reg: '$d0', virtual-reg: '%0' }
40  - { reg: '$d1', virtual-reg: '%1' }
41  - { reg: '$d2', virtual-reg: '%2' }
42  - { reg: '$q3', virtual-reg: '%3' }
43frameInfo:
44  isFrameAddressTaken: false
45  isReturnAddressTaken: false
46  hasStackMap:     false
47  hasPatchPoint:   false
48  stackSize:       0
49  offsetAdjustment: 0
50  maxAlignment:    8
51  adjustsStack:    true
52  hasCalls:        true
53  stackProtector:  ''
54  maxCallFrameSize: 0
55  cvBytesOfCalleeSavedRegisters: 0
56  hasOpaqueSPAdjustment: false
57  hasVAStart:      false
58  hasMustTailInVarArgFunc: false
59  hasTailCall:     false
60  localFrameSize:  0
61  savePoint:       ''
62  restorePoint:    ''
63fixedStack:      []
64stack:
65  - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
66      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
67      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
68  - { id: 1, name: '', type: default, offset: 0, size: 2, alignment: 4,
69      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
70      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
71  - { id: 2, name: '', type: default, offset: 0, size: 1, alignment: 4,
72      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
73      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
74  - { id: 3, name: '', type: default, offset: 0, size: 8, alignment: 8,
75      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
76      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
77callSites:       []
78debugValueSubstitutions: []
79constants:       []
80machineFunctionInfo: {}
81body:             |
82  bb.0.entry:
83    liveins: $d0, $d1, $d2, $q3
84
85    %3:fpr128 = COPY $q3
86    %2:fpr64 = COPY $d2
87    %1:fpr64 = COPY $d1
88    %0:fpr64 = COPY $d0
89    %4:fpr64 = SSHRv2i32_shift %0, 1
90    %6:fpr128 = IMPLICIT_DEF
91    %5:fpr128 = INSERT_SUBREG %6, killed %4, %subreg.dsub
92    %7:fpr64 = SSHRv4i16_shift %1, 1
93    %9:fpr128 = IMPLICIT_DEF
94    %8:fpr128 = INSERT_SUBREG %9, killed %7, %subreg.dsub
95    %10:fpr64 = SSHRv8i8_shift %2, 1
96    %12:fpr128 = IMPLICIT_DEF
97    %11:fpr128 = INSERT_SUBREG %12, killed %10, %subreg.dsub
98    %13:fpr128 = SSHRv2i64_shift %3, 1
99    ST1i64 killed %13, 1, %stack.3 :: (store (s64) into %stack.3)
100    ST1i16 killed %8, 1, %stack.1 :: (store (s16) into %stack.1, align 4)
101    ST1i32 killed %5, 1, %stack.0 :: (store (s32) into %stack.0)
102    ST1i8 killed %11, 1, %stack.2 :: (store (s8) into %stack.2, align 4)
103    ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
104    %14:gpr32all = IMPLICIT_DEF
105    $w0 = COPY %14
106    %15:gpr64all = IMPLICIT_DEF
107    STATEPOINT 2, 4, 1, killed %15, $w0, 2, 0, 2, 0, 2, 4, 1, 4, %stack.0, 0, 1, 2, %stack.1, 0, 1, 1, %stack.2, 0, 1, 8, %stack.3, 0, 2, 0, 2, 0, 2, 0, csr_aarch64_aapcs, implicit-def $sp :: (volatile load store (s32) on %stack.0), (volatile load store (s16) on %stack.1, align 4), (volatile load store (s8) on %stack.2, align 4), (volatile load store (s64) on %stack.3)
108    ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
109    RET_ReallyLR
110
111...
112