xref: /llvm-project/llvm/test/CodeGen/AArch64/aarch64_tree_tests.ll (revision 4a67f809828e11988c6a097cb400fd7cbbf47628) 
1; RUN: llc < %s | FileCheck %s
2
3; ModuleID = 'aarch64_tree_tests.bc'
4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
5target triple = "arm64--linux-gnu"
6
7; CHECK-LABEL: .LCPI0_0:
8; CHECK-NEXT:    .hword 32768
9; CHECK-NEXT:    .hword 32767
10; CHECK-NEXT:    .hword 4664
11; CHECK-NEXT:    .hword 32767
12; CHECK-NEXT:    .hword 32768
13; CHECK-NEXT:    .hword 32768
14; CHECK-NEXT:    .hword 0
15; CHECK-NEXT:    .hword 0
16
17; Function Attrs: nounwind readnone
18define <8 x i16> @aarch64_tree_tests_and(<8 x i16> %a) {
19entry:
20  %and = and <8 x i16> <i16 0, i16 undef, i16 undef, i16 0, i16 0, i16 undef, i16 undef, i16 0>, %a
21  %ret = add <8 x i16> %and, <i16 -32768, i16 32767, i16 4664, i16 32767, i16 -32768, i16 -32768, i16 0, i16 0>
22  ret <8 x i16> %ret
23}
24
25; CHECK-LABEL: .LCPI1_0:
26; CHECK-NEXT:    .hword 32768
27; CHECK-NEXT:    .hword 32766
28; CHECK-NEXT:    .hword 4664
29; CHECK-NEXT:    .hword 32766
30; CHECK-NEXT:    .hword 32768
31; CHECK-NEXT:    .hword 32768
32; CHECK-NEXT:    .hword 65535
33; CHECK-NEXT:    .hword 65535
34
35; Function Attrs: nounwind readnone
36define <8 x i16> @aarch64_tree_tests_or(<8 x i16> %a) {
37entry:
38  %or = or <8 x i16> <i16 -1, i16 undef, i16 undef, i16 -1, i16 -1, i16 undef, i16 undef, i16 -1>, %a
39  %ret = add <8 x i16> %or, <i16 -32767, i16 32767, i16 4665, i16 32767, i16 -32767, i16 -32767, i16 0, i16 0>
40  ret <8 x i16> %ret
41}
42
43