1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple aarch64 -mattr=+d128 | FileCheck %s --check-prefixes=CHECK-LE 3; RUN: llc < %s -mtriple aarch64_be -mattr=+d128 | FileCheck %s --check-prefixes=CHECK-BE 4 5define i128 @test_rsr128() #0 { 6; CHECK-LE-LABEL: test_rsr128: 7; CHECK-LE: // %bb.0: // %entry 8; CHECK-LE-NEXT: mrrs x0, x1, S1_2_C3_C4_5 9; CHECK-LE-NEXT: ret 10; 11; CHECK-BE-LABEL: test_rsr128: 12; CHECK-BE: // %bb.0: // %entry 13; CHECK-BE-NEXT: mrrs x2, x3, S1_2_C3_C4_5 14; CHECK-BE-NEXT: mov x0, x3 15; CHECK-BE-NEXT: mov x1, x2 16; CHECK-BE-NEXT: ret 17entry: 18 %0 = call i128 @llvm.read_volatile_register.i128(metadata !1) 19 ret i128 %0 20} 21 22declare i128 @llvm.read_volatile_register.i128(metadata) #1 23 24define void @test_wsr128(i128 noundef %v) #0 { 25; CHECK-LE-LABEL: test_wsr128: 26; CHECK-LE: // %bb.0: // %entry 27; CHECK-LE-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1 28; CHECK-LE-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1 29; CHECK-LE-NEXT: msrr S1_2_C3_C4_5, x0, x1 30; CHECK-LE-NEXT: ret 31; 32; CHECK-BE-LABEL: test_wsr128: 33; CHECK-BE: // %bb.0: // %entry 34; CHECK-BE-NEXT: mov x2, x1 35; CHECK-BE-NEXT: mov x3, x0 36; CHECK-BE-NEXT: msrr S1_2_C3_C4_5, x2, x3 37; CHECK-BE-NEXT: ret 38entry: 39 call void @llvm.write_register.i128(metadata !1, i128 %v) 40 ret void 41} 42 43declare void @llvm.write_register.i128(metadata, i128) #1 44 45attributes #0 = { noinline nounwind } 46attributes #1 = { nounwind } 47 48!1 = !{!"1:2:3:4:5"} 49