1; RUN: llc -O3 -aarch64-enable-gep-opt=true -print-after=codegenprepare -mcpu=cortex-a53 < %s >%t 2>&1 && FileCheck <%t %s 2; REQUIRES: asserts 3target triple = "aarch64--linux-android" 4 5%typeD = type { i32, i32, [256 x i32], [257 x i32] } 6 7; Function Attrs: noreturn nounwind uwtable 8define i32 @test1(ptr nocapture %s) { 9entry: 10; CHECK-LABEL: entry: 11; CHECK: %uglygep = getelementptr i8, ptr %s, i64 1032 12; CHECK: br label %do.body.i 13 14 15 %k0 = getelementptr inbounds %typeD, ptr %s, i64 0, i32 1 16 %.pre = load i32, ptr %s, align 4 17 br label %do.body.i 18 19do.body.i: 20; CHECK-LABEL: do.body.i: 21; CHECK: %uglygep2 = getelementptr i8, ptr %uglygep, i64 %2 22; CHECK-NOT: %uglygep2 = getelementptr i8, ptr %uglygep, i64 1032 23 24 25 %0 = phi i32 [ 256, %entry ], [ %.be, %do.body.i.backedge ] 26 %1 = phi i32 [ 0, %entry ], [ %.be6, %do.body.i.backedge ] 27 %add.i = add nsw i32 %1, %0 28 %shr.i = ashr i32 %add.i, 1 29 %idxprom.i = sext i32 %shr.i to i64 30 %arrayidx.i = getelementptr inbounds %typeD, ptr %s, i64 0, i32 3, i64 %idxprom.i 31 %2 = load i32, ptr %arrayidx.i, align 4 32 %cmp.i = icmp sle i32 %2, %.pre 33 %na.1.i = select i1 %cmp.i, i32 %0, i32 %shr.i 34 %nb.1.i = select i1 %cmp.i, i32 %shr.i, i32 %1 35 %sub.i = sub nsw i32 %na.1.i, %nb.1.i 36 %cmp1.i = icmp eq i32 %sub.i, 1 37 br i1 %cmp1.i, label %fooo.exit, label %do.body.i.backedge 38 39do.body.i.backedge: 40 %.be = phi i32 [ %na.1.i, %do.body.i ], [ 256, %fooo.exit ] 41 %.be6 = phi i32 [ %nb.1.i, %do.body.i ], [ 0, %fooo.exit ] 42 br label %do.body.i 43 44fooo.exit: ; preds = %do.body.i 45 store i32 %nb.1.i, ptr %k0, align 4 46 br label %do.body.i.backedge 47} 48 49