xref: /llvm-project/llvm/test/CodeGen/AArch64/aarch64-isel-csinc-type.ll (revision 064b2a6dc6c947ebf9363a3ec917b84719e8941e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-- -o - < %s | FileCheck %s
3
4; Verify that we can fold csneg/csel into csinc instruction.
5
6target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
7target triple = "aarch64-unknown-linux-gnu"
8
9; char csinc1 (char a, char b) { return !a ? b+1 : b+3; }
10define i8 @csinc1(i8 %a, i8 %b) local_unnamed_addr #0 {
11; CHECK-LABEL: csinc1:
12; CHECK:       // %bb.0: // %entry
13; CHECK-NEXT:    tst w0, #0xff
14; CHECK-NEXT:    add w8, w1, #3
15; CHECK-NEXT:    csinc w0, w8, w1, ne
16; CHECK-NEXT:    ret
17entry:
18  %tobool.not = icmp eq i8 %a, 0
19  %cond.v = select i1 %tobool.not, i8 1, i8 3
20  %cond = add i8 %cond.v, %b
21  ret i8 %cond
22}
23
24; short csinc2 (short a, short b) { return !a ? b+1 : b+3; }
25define i16 @csinc2(i16 %a, i16 %b) local_unnamed_addr #0 {
26; CHECK-LABEL: csinc2:
27; CHECK:       // %bb.0: // %entry
28; CHECK-NEXT:    tst w0, #0xffff
29; CHECK-NEXT:    add w8, w1, #3
30; CHECK-NEXT:    csinc w0, w8, w1, ne
31; CHECK-NEXT:    ret
32entry:
33  %tobool.not = icmp eq i16 %a, 0
34  %cond.v = select i1 %tobool.not, i16 1, i16 3
35  %cond = add i16 %cond.v, %b
36  ret i16 %cond
37}
38
39; int csinc3 (int a, int b) { return !a ? b+1 : b+3; }
40define i32 @csinc3(i32 %a, i32 %b) local_unnamed_addr #0 {
41; CHECK-LABEL: csinc3:
42; CHECK:       // %bb.0: // %entry
43; CHECK-NEXT:    cmp w0, #0
44; CHECK-NEXT:    add w8, w1, #3
45; CHECK-NEXT:    csinc w0, w8, w1, ne
46; CHECK-NEXT:    ret
47entry:
48  %tobool.not = icmp eq i32 %a, 0
49  %cond.v = select i1 %tobool.not, i32 1, i32 3
50  %cond = add nsw i32 %cond.v, %b
51  ret i32 %cond
52}
53
54; long long csinc4 (long long a, long long b) { return !a ? b+1 : b+3; }
55define i64 @csinc4(i64 %a, i64 %b) local_unnamed_addr #0 {
56; CHECK-LABEL: csinc4:
57; CHECK:       // %bb.0: // %entry
58; CHECK-NEXT:    cmp x0, #0
59; CHECK-NEXT:    add x8, x1, #3
60; CHECK-NEXT:    csinc x0, x8, x1, ne
61; CHECK-NEXT:    ret
62entry:
63  %tobool.not = icmp eq i64 %a, 0
64  %cond.v = select i1 %tobool.not, i64 1, i64 3
65  %cond = add nsw i64 %cond.v, %b
66  ret i64 %cond
67}
68
69; long long csinc8 (long long a, long long b) { return a ? b-1 : b+1; }
70define i64 @csinc8(i64 %a, i64 %b) {
71; CHECK-LABEL: csinc8:
72; CHECK:       // %bb.0: // %entry
73; CHECK-NEXT:    sub x8, x1, #1
74; CHECK-NEXT:    cmp x0, #0
75; CHECK-NEXT:    csinc x0, x8, x1, ne
76; CHECK-NEXT:    ret
77entry:
78  %tobool.not = icmp eq i64 %a, 0
79  %cond.v = select i1 %tobool.not, i64 1, i64 -1
80  %cond = add nsw i64 %cond.v, %b
81  ret i64 %cond
82}
83
84; long long csinc9 (long long a, long long b) { return a ? b+1 : b-1; }
85define i64 @csinc9(i64 %a, i64 %b) {
86; CHECK-LABEL: csinc9:
87; CHECK:       // %bb.0: // %entry
88; CHECK-NEXT:    sub x8, x1, #1
89; CHECK-NEXT:    cmp x0, #0
90; CHECK-NEXT:    csinc x0, x8, x1, eq
91; CHECK-NEXT:    ret
92entry:
93  %tobool.not = icmp eq i64 %a, 0
94  %cond.v = select i1 %tobool.not, i64 -1, i64 1
95  %cond = add nsw i64 %cond.v, %b
96  ret i64 %cond
97}
98