1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple=aarch64-linux-gnu -O0 -stop-after=irtranslator -verify-machineinstrs -o - %s | FileCheck %s 3 4define <2 x half> @f16_vec_param(<2 x half> %v) { 5 ; CHECK-LABEL: name: f16_vec_param 6 ; CHECK: bb.1 (%ir-block.0): 7 ; CHECK-NEXT: liveins: $d0 8 ; CHECK-NEXT: {{ $}} 9 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 10 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 11 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[UV]](<2 x s16>) 12 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF 13 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[UV2]](s16), [[UV3]](s16), [[DEF]](s16), [[DEF]](s16) 14 ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) 15 ; CHECK-NEXT: RET_ReallyLR implicit $d0 16 ret <2 x half> %v 17} 18 19define <2 x i16> @i16_vec_param(<2 x i16> %v) { 20 ; CHECK-LABEL: name: i16_vec_param 21 ; CHECK: bb.1 (%ir-block.0): 22 ; CHECK-NEXT: liveins: $d0 23 ; CHECK-NEXT: {{ $}} 24 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 25 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[COPY]](<2 x s32>) 26 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<2 x s32>) = G_ANYEXT [[TRUNC]](<2 x s16>) 27 ; CHECK-NEXT: $d0 = COPY [[ANYEXT]](<2 x s32>) 28 ; CHECK-NEXT: RET_ReallyLR implicit $d0 29 ret <2 x i16> %v 30} 31