xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-store-truncating-float.mir (revision 1ee315ae7964c8433b772e0b5d667834994ba753) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3--- |
4  define void @truncating_f32(double %x) {
5    %alloca = alloca i32, align 4
6    %bitcast = bitcast double %x to i64
7    %trunc = trunc i64 %bitcast to i32
8    store i32 %trunc, ptr %alloca, align 4
9    ret void
10  }
11
12  define void @truncating_f16(double %x) {
13    %alloca = alloca i16, align 2
14    %bitcast = bitcast double %x to i64
15    %trunc = trunc i64 %bitcast to i16
16    store i16 %trunc, ptr %alloca, align 2
17    ret void
18  }
19
20  define void @truncating_f8(double %x) {
21    %alloca = alloca i8, align 1
22    %bitcast = bitcast double %x to i64
23    %trunc = trunc i64 %bitcast to i8
24    store i8 %trunc, ptr %alloca, align 1
25    ret void
26  }
27
28...
29---
30name:            truncating_f32
31alignment:       4
32legalized:       true
33regBankSelected: true
34tracksRegLiveness: true
35liveins:
36  - { reg: '$d0' }
37frameInfo:
38  maxAlignment:    4
39stack:
40  - { id: 0, name: alloca, size: 4, alignment: 4 }
41machineFunctionInfo: {}
42body:             |
43  bb.1 (%ir-block.0):
44    liveins: $d0
45
46    ; CHECK-LABEL: name: truncating_f32
47    ; CHECK: liveins: $d0
48    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
49    ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY [[COPY]].ssub
50    ; CHECK: STRSui [[COPY1]], %stack.0.alloca, 0 :: (store (s32) into %ir.alloca)
51    ; CHECK: RET_ReallyLR
52    %0:fpr(s64) = COPY $d0
53    %1:gpr(p0) = G_FRAME_INDEX %stack.0.alloca
54    G_STORE %0(s64), %1(p0) :: (store (s32) into %ir.alloca)
55    RET_ReallyLR
56
57...
58---
59name:            truncating_f16
60alignment:       4
61legalized:       true
62regBankSelected: true
63tracksRegLiveness: true
64liveins:
65  - { reg: '$d0' }
66frameInfo:
67  maxAlignment:    2
68stack:
69  - { id: 0, name: alloca, size: 2, alignment: 2 }
70machineFunctionInfo: {}
71body:             |
72  bb.1 (%ir-block.0):
73    liveins: $d0
74
75    ; CHECK-LABEL: name: truncating_f16
76    ; CHECK: liveins: $d0
77    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
78    ; CHECK: [[COPY1:%[0-9]+]]:fpr16 = COPY [[COPY]].hsub
79    ; CHECK: STRHui [[COPY1]], %stack.0.alloca, 0 :: (store (s16) into %ir.alloca)
80    ; CHECK: RET_ReallyLR
81    %0:fpr(s64) = COPY $d0
82    %1:gpr(p0) = G_FRAME_INDEX %stack.0.alloca
83    G_STORE %0(s64), %1(p0) :: (store (s16) into %ir.alloca)
84    RET_ReallyLR
85
86...
87---
88name:            truncating_f8
89alignment:       4
90legalized:       true
91regBankSelected: true
92tracksRegLiveness: true
93liveins:
94  - { reg: '$d0' }
95frameInfo:
96  maxAlignment:    1
97stack:
98  - { id: 0, name: alloca, size: 1, alignment: 1 }
99machineFunctionInfo: {}
100body:             |
101  bb.1 (%ir-block.0):
102    liveins: $d0
103
104    ; CHECK-LABEL: name: truncating_f8
105    ; CHECK: liveins: $d0
106    ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
107    ; CHECK: [[COPY1:%[0-9]+]]:fpr8 = COPY [[COPY]].bsub
108    ; CHECK: STRBui [[COPY1]], %stack.0.alloca, 0 :: (store (s8) into %ir.alloca)
109    ; CHECK: RET_ReallyLR
110    %0:fpr(s64) = COPY $d0
111    %1:gpr(p0) = G_FRAME_INDEX %stack.0.alloca
112    G_STORE %0(s64), %1(p0) :: (store (s8) into %ir.alloca)
113    RET_ReallyLR
114
115...
116