1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 2# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-uknown -global-isel-abort=1 -run-pass=instruction-select %s -o - | FileCheck %s 3... 4--- 5name: ssube_s64 6alignment: 4 7legalized: true 8regBankSelected: true 9tracksRegLiveness: true 10body: | 11 bb.1: 12 liveins: $x0, $x1 13 14 ; CHECK-LABEL: name: ssube_s64 15 ; CHECK: liveins: $x0, $x1 16 ; CHECK-NEXT: {{ $}} 17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 18 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1 19 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1 20 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr $wzr, [[MOVi32imm]], implicit-def $nzcv 21 ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64 = SBCSXr [[COPY]], [[COPY1]], implicit-def $nzcv, implicit $nzcv 22 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 23 ; CHECK-NEXT: $x0 = COPY [[SBCSXr]] 24 ; CHECK-NEXT: $w1 = COPY [[CSINCWr]] 25 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1 26 %0:gpr(s64) = COPY $x0 27 %1:gpr(s64) = COPY $x1 28 %2:gpr(s32) = G_CONSTANT i32 1 29 %3:gpr(s64), %4:gpr(s32) = G_SSUBE %0, %1, %2 30 $x0 = COPY %3(s64) 31 $w1 = COPY %4(s32) 32 RET_ReallyLR implicit $x0, implicit $w1 33... 34... 35--- 36name: ssube_s32 37alignment: 4 38legalized: true 39regBankSelected: true 40tracksRegLiveness: true 41body: | 42 bb.1: 43 liveins: $w0, $w1 44 45 ; CHECK-LABEL: name: ssube_s32 46 ; CHECK: liveins: $w0, $w1 47 ; CHECK-NEXT: {{ $}} 48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 49 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1 50 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1 51 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr $wzr, [[MOVi32imm]], implicit-def $nzcv 52 ; CHECK-NEXT: [[SBCSWr:%[0-9]+]]:gpr32 = SBCSWr [[COPY]], [[COPY1]], implicit-def $nzcv, implicit $nzcv 53 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 54 ; CHECK-NEXT: $w0 = COPY [[SBCSWr]] 55 ; CHECK-NEXT: $w1 = COPY [[CSINCWr]] 56 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1 57 %0:gpr(s32) = COPY $w0 58 %1:gpr(s32) = COPY $w1 59 %2:gpr(s32) = G_CONSTANT i32 1 60 %3:gpr(s32), %4:gpr(s32) = G_SSUBE %0, %1, %2 61 $w0 = COPY %3(s32) 62 $w1 = COPY %4(s32) 63 RET_ReallyLR implicit $w0, implicit $w1 64... 65... 66--- 67name: ssube_opt_prev_usubo 68alignment: 4 69legalized: true 70regBankSelected: true 71tracksRegLiveness: true 72body: | 73 bb.1: 74 liveins: $x0, $x1, $x2, $x3 75 76 ; CHECK-LABEL: name: ssube_opt_prev_usubo 77 ; CHECK: liveins: $x0, $x1, $x2, $x3 78 ; CHECK-NEXT: {{ $}} 79 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 80 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1 81 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2 82 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3 83 ; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY2]], implicit-def $nzcv 84 ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64 = SBCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv 85 ; CHECK-NEXT: $x0 = COPY [[SUBSXrr]] 86 ; CHECK-NEXT: $x1 = COPY [[SBCSXr]] 87 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1 88 %0:gpr(s64) = COPY $x0 89 %1:gpr(s64) = COPY $x1 90 %2:gpr(s64) = COPY $x2 91 %3:gpr(s64) = COPY $x3 92 %8:gpr(s64), %12:gpr(s32) = G_USUBO %0, %2 93 %9:gpr(s64), %13:gpr(s32) = G_SSUBE %1, %3, %12 94 $x0 = COPY %8(s64) 95 $x1 = COPY %9(s64) 96 RET_ReallyLR implicit $x0, implicit $x1 97... 98... 99--- 100name: ssube_opt_prev_usube 101alignment: 4 102legalized: true 103regBankSelected: true 104tracksRegLiveness: true 105body: | 106 bb.1: 107 liveins: $x0, $x1, $x2, $x3 108 109 ; CHECK-LABEL: name: ssube_opt_prev_usube 110 ; CHECK: liveins: $x0, $x1, $x2, $x3 111 ; CHECK-NEXT: {{ $}} 112 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 113 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1 114 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2 115 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3 116 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1 117 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr $wzr, [[MOVi32imm]], implicit-def $nzcv 118 ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64 = SBCSXr [[COPY]], [[COPY2]], implicit-def $nzcv, implicit $nzcv 119 ; CHECK-NEXT: [[SBCSXr1:%[0-9]+]]:gpr64 = SBCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv 120 ; CHECK-NEXT: $x0 = COPY [[SBCSXr]] 121 ; CHECK-NEXT: $x1 = COPY [[SBCSXr1]] 122 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1 123 %0:gpr(s64) = COPY $x0 124 %1:gpr(s64) = COPY $x1 125 %2:gpr(s64) = COPY $x2 126 %3:gpr(s64) = COPY $x3 127 %6:gpr(s32) = G_CONSTANT i32 1 128 %8:gpr(s64), %12:gpr(s32) = G_USUBE %0, %2, %6 129 %9:gpr(s64), %13:gpr(s32) = G_SSUBE %1, %3, %12 130 $x0 = COPY %8(s64) 131 $x1 = COPY %9(s64) 132 RET_ReallyLR implicit $x0, implicit $x1 133... 134... 135--- 136name: ssube_opt_bail_clobber 137alignment: 4 138legalized: true 139regBankSelected: true 140tracksRegLiveness: true 141body: | 142 bb.1: 143 liveins: $x0, $x1, $x2, $x4, $x5, $x6 144 145 ; CHECK-LABEL: name: ssube_opt_bail_clobber 146 ; CHECK: liveins: $x0, $x1, $x2, $x4, $x5, $x6 147 ; CHECK-NEXT: {{ $}} 148 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 149 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1 150 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2 151 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x4 152 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64 = COPY $x5 153 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr64 = COPY $x6 154 ; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY3]], implicit-def $nzcv 155 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv 156 ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64 = SBCSXr [[COPY1]], [[COPY4]], implicit-def $nzcv, implicit $nzcv 157 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr $wzr, [[CSINCWr]], implicit-def $nzcv 158 ; CHECK-NEXT: [[SBCSXr1:%[0-9]+]]:gpr64 = SBCSXr [[COPY2]], [[COPY5]], implicit-def $nzcv, implicit $nzcv 159 ; CHECK-NEXT: $x0 = COPY [[SUBSXrr]] 160 ; CHECK-NEXT: $x1 = COPY [[SBCSXr]] 161 ; CHECK-NEXT: $x2 = COPY [[SBCSXr1]] 162 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1, implicit $x2 163 %0:gpr(s64) = COPY $x0 164 %1:gpr(s64) = COPY $x1 165 %2:gpr(s64) = COPY $x2 166 %4:gpr(s64) = COPY $x4 167 %5:gpr(s64) = COPY $x5 168 %6:gpr(s64) = COPY $x6 169 %7:gpr(s64), %11:gpr(s32) = G_USUBO %0, %4 170 %8:gpr(s64), %12:gpr(s32) = G_USUBE %1, %5, %11 171 ; carry-in is not produced by previous instruction 172 %9:gpr(s64), %13:gpr(s32) = G_SSUBE %2, %6, %11 173 $x0 = COPY %7(s64) 174 $x1 = COPY %8(s64) 175 $x2 = COPY %9(s64) 176 RET_ReallyLR implicit $x0, implicit $x1, implicit $x2 177... 178... 179--- 180name: ssube_opt_prev_dead 181alignment: 4 182legalized: true 183regBankSelected: true 184tracksRegLiveness: true 185body: | 186 bb.1: 187 liveins: $x0, $x1, $x2, $x3 188 ; CHECK-LABEL: name: ssube_opt_prev_dead 189 ; CHECK: liveins: $x0, $x1, $x2, $x3 190 ; CHECK-NEXT: {{ $}} 191 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 192 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1 193 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2 194 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3 195 ; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY2]], implicit-def $nzcv 196 ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64 = SBCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv 197 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 198 ; CHECK-NEXT: $w0 = COPY [[CSINCWr]] 199 ; CHECK-NEXT: RET_ReallyLR implicit $w0 200 %0:gpr(s64) = COPY $x0 201 %1:gpr(s64) = COPY $x1 202 %2:gpr(s64) = COPY $x2 203 %3:gpr(s64) = COPY $x3 204 %4:gpr(s64), %5:gpr(s32) = G_USUBO %0, %2 205 %6:gpr(s64), %7:gpr(s32) = G_SSUBE %1, %3, %5 206 $w0 = COPY %7(s32) 207 RET_ReallyLR implicit $w0 208... 209