xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir (revision 321bfb210a2d5a6da659e74715d83c7b2dc752eb)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4--- |
5  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6
7  define void @gmerge_s64_s32() { ret void }
8...
9
10---
11name:            gmerge_s64_s32
12legalized:       true
13regBankSelected: true
14registers:
15  - { id: 0, class: gpr }
16  - { id: 1, class: gpr }
17  - { id: 2, class: gpr }
18
19body:             |
20  bb.0:
21    liveins: $w0, $w1
22
23    ; CHECK-LABEL: name: gmerge_s64_s32
24    ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0
25    ; CHECK: [[COPY1:%[0-9]+]]:gpr32all = COPY $w1
26    ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32
27    ; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_32
28    ; CHECK: [[BFMXri:%[0-9]+]]:gpr64 = BFMXri [[SUBREG_TO_REG]], [[SUBREG_TO_REG1]], 32, 31
29    ; CHECK: $x0 = COPY [[BFMXri]]
30    %0(s32) = COPY $w0
31    %1(s32) = COPY $w1
32    %2(s64) = G_MERGE_VALUES %0(s32), %1(s32)
33    $x0 = COPY %2(s64)
34...
35