1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select -global-isel-abort=1 %s | FileCheck %s 3--- | 4 define i32 @jt_test(i32 %x) { 5 entry: 6 switch i32 %x, label %return [ 7 i32 75, label %sw.bb 8 i32 34, label %sw.bb 9 i32 56, label %sw.bb 10 i32 35, label %sw.bb 11 i32 40, label %sw.bb 12 i32 4, label %sw.bb1 13 i32 5, label %sw.bb1 14 i32 6, label %sw.bb1 15 ] 16 17 sw.bb: 18 %add = add nsw i32 %x, 42 19 br label %return 20 21 sw.bb1: 22 %mul = mul nsw i32 %x, 3 23 br label %return 24 25 return: 26 %retval.0 = phi i32 [ %mul, %sw.bb1 ], [ %add, %sw.bb ], [ 0, %entry ] 27 ret i32 %retval.0 28 } 29 30... 31--- 32name: jt_test 33alignment: 4 34legalized: true 35regBankSelected: true 36tracksRegLiveness: true 37machineFunctionInfo: {} 38jumpTable: 39 kind: block-address 40 entries: 41 - id: 0 42 blocks: [ '%bb.3', '%bb.3', '%bb.3', '%bb.4', '%bb.4', '%bb.4', 43 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 44 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 45 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 46 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 47 '%bb.2', '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 48 '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 49 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 50 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2', '%bb.4', 51 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 52 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', 53 '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2' ] 54body: | 55 ; CHECK-LABEL: name: jt_test 56 ; CHECK: bb.0.entry: 57 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.1(0x40000000) 58 ; CHECK-NEXT: liveins: $w0 59 ; CHECK-NEXT: {{ $}} 60 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0 61 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr 62 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 4, 0, implicit-def dead $nzcv 63 ; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, [[SUBSWri]], 0 64 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[ORRWrs]], %subreg.sub_32 65 ; CHECK-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 71, 0, implicit-def $nzcv 66 ; CHECK-NEXT: Bcc 8, %bb.4, implicit $nzcv 67 ; CHECK-NEXT: {{ $}} 68 ; CHECK-NEXT: bb.1.entry: 69 ; CHECK-NEXT: successors: %bb.3(0x2aaaaaab), %bb.4(0x2aaaaaab), %bb.2(0x2aaaaaab) 70 ; CHECK-NEXT: {{ $}} 71 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr 72 ; CHECK-NEXT: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0 73 ; CHECK-NEXT: early-clobber %17:gpr64, early-clobber %18:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0 74 ; CHECK-NEXT: JUMP_TABLE_DEBUG_INFO 0 75 ; CHECK-NEXT: BR %17 76 ; CHECK-NEXT: {{ $}} 77 ; CHECK-NEXT: bb.2.sw.bb: 78 ; CHECK-NEXT: successors: %bb.4(0x80000000) 79 ; CHECK-NEXT: {{ $}} 80 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = nsw ADDWri [[COPY]], 42, 0 81 ; CHECK-NEXT: B %bb.4 82 ; CHECK-NEXT: {{ $}} 83 ; CHECK-NEXT: bb.3.sw.bb1: 84 ; CHECK-NEXT: successors: %bb.4(0x80000000) 85 ; CHECK-NEXT: {{ $}} 86 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 3 87 ; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[COPY]], [[MOVi32imm]], $wzr 88 ; CHECK-NEXT: {{ $}} 89 ; CHECK-NEXT: bb.4.return: 90 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[MADDWrrr]], %bb.3, [[ADDWri]], %bb.2, [[COPY1]], %bb.0, [[COPY2]], %bb.1 91 ; CHECK-NEXT: $w0 = COPY [[PHI]] 92 ; CHECK-NEXT: RET_ReallyLR implicit $w0 93 bb.1.entry: 94 liveins: $w0 95 96 %0:gpr(s32) = COPY $w0 97 %4:gpr(s32) = G_CONSTANT i32 71 98 %8:gpr(s32) = G_CONSTANT i32 3 99 %10:gpr(s32) = G_CONSTANT i32 42 100 %13:gpr(s32) = G_CONSTANT i32 0 101 %1:gpr(s32) = G_CONSTANT i32 4 102 %2:gpr(s32) = G_SUB %0, %1 103 %3:gpr(s64) = G_ZEXT %2(s32) 104 %5:gpr(s64) = G_ZEXT %4(s32) 105 %14:gpr(s32) = G_ICMP intpred(ugt), %3(s64), %5 106 G_BRCOND %14, %bb.4 107 108 bb.5.entry: 109 successors: %bb.3, %bb.4, %bb.2 110 111 %17:gpr(s32) = G_CONSTANT i32 0 112 %7:gpr(p0) = G_JUMP_TABLE %jump-table.0 113 G_BRJT %7(p0), %jump-table.0, %3(s64) 114 115 bb.2.sw.bb: 116 %16:gpr(s32) = G_CONSTANT i32 42 117 %11:gpr(s32) = nsw G_ADD %0, %16 118 G_BR %bb.4 119 120 bb.3.sw.bb1: 121 %15:gpr(s32) = G_CONSTANT i32 3 122 %9:gpr(s32) = nsw G_MUL %0, %15 123 124 bb.4.return: 125 %12:gpr(s32) = G_PHI %9(s32), %bb.3, %11(s32), %bb.2, %13(s32), %bb.1, %17(s32), %bb.5 126 $w0 = COPY %12(s32) 127 RET_ReallyLR implicit $w0 128 129... 130