xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir (revision 0c5c7b52f0f395a6beb7956ba210b8ca727c0471)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s
3
4# When we select the G_ZEXTLOAD, the SUBREG_TO_REG will initially land on a
5# gpr64sp register.
6#
7# This caused a test failure when selecting the G_BRJT, because it was not being
8# constrained. This test checks that the G_BRJT is actually being constrained.
9# As a result, the SUBREG_TO_REG should end up on a gpr64common.
10
11...
12---
13name:            check_constrain
14legalized:       true
15regBankSelected: true
16tracksRegLiveness: true
17jumpTable:
18  kind:            block-address
19  entries:
20    - id:              0
21      blocks:          [ '%bb.4' ]
22body:             |
23  ; CHECK-LABEL: name: check_constrain
24  ; CHECK: bb.0:
25  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
26  ; CHECK-NEXT: {{  $}}
27  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr64common = IMPLICIT_DEF
28  ; CHECK-NEXT:   [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[DEF]], 0 :: (load (s8))
29  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[LDRBBui]], %subreg.sub_32
30  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 8, 0, implicit-def $nzcv
31  ; CHECK-NEXT:   Bcc 8, %bb.3, implicit $nzcv
32  ; CHECK-NEXT: {{  $}}
33  ; CHECK-NEXT: bb.1:
34  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
35  ; CHECK-NEXT: {{  $}}
36  ; CHECK-NEXT:   [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
37  ; CHECK-NEXT:   early-clobber %5:gpr64, early-clobber %6:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
38  ; CHECK-NEXT:   JUMP_TABLE_DEBUG_INFO 0
39  ; CHECK-NEXT:   BR %5
40  ; CHECK-NEXT: {{  $}}
41  ; CHECK-NEXT: bb.2:
42  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT:   B %bb.3
45  ; CHECK-NEXT: {{  $}}
46  ; CHECK-NEXT: bb.3:
47  ; CHECK-NEXT:   RET_ReallyLR
48  bb.1:
49    %1:gpr(p0) = G_IMPLICIT_DEF
50    %5:gpr(s64) = G_ZEXTLOAD %1(p0) :: (load (s8))
51    %7:gpr(s64) = G_CONSTANT i64 8
52    %16:gpr(s32) = G_ICMP intpred(ugt), %5(s64), %7
53    G_BRCOND %16, %bb.4
54
55  bb.2:
56    successors: %bb.3, %bb.4
57
58    %9:gpr(p0) = G_JUMP_TABLE %jump-table.0
59    G_BRJT %9(p0), %jump-table.0, %5(s64)
60
61  bb.3:
62    G_BR %bb.4
63
64  bb.4:
65    RET_ReallyLR
66
67...
68