xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-ctpop.mir (revision 516d09387bede5369b2811f56020ed2d316403dd)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs -run-pass=instruction-select %s -o - | FileCheck %s
3
4...
5---
6name:            CNTv8i8
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.0:
12    liveins: $d0
13
14    ; CHECK-LABEL: name: CNTv8i8
15    ; CHECK: liveins: $d0
16    ; CHECK: %copy:fpr64 = COPY $d0
17    ; CHECK: %ctpop:fpr64 = CNTv8i8 %copy
18    ; CHECK: $d0 = COPY %ctpop
19    ; CHECK: RET_ReallyLR implicit $d0
20    %copy:fpr(<8 x s8>) = COPY $d0
21    %ctpop:fpr(<8 x s8>) = G_CTPOP %copy(<8 x s8>)
22    $d0 = COPY %ctpop(<8 x s8>)
23    RET_ReallyLR implicit $d0
24
25...
26---
27name:            CNTv16i8
28legalized:       true
29regBankSelected: true
30tracksRegLiveness: true
31body:             |
32  bb.0:
33    liveins: $q0
34
35    ; CHECK-LABEL: name: CNTv16i8
36    ; CHECK: liveins: $q0
37    ; CHECK: %copy:fpr128 = COPY $q0
38    ; CHECK: %ctpop:fpr128 = CNTv16i8 %copy
39    ; CHECK: $q0 = COPY %ctpop
40    ; CHECK: RET_ReallyLR implicit $q0
41    %copy:fpr(<16 x s8>) = COPY $q0
42    %ctpop:fpr(<16 x s8>) = G_CTPOP %copy(<16 x s8>)
43    $q0 = COPY %ctpop(<16 x s8>)
44    RET_ReallyLR implicit $q0
45
46...
47