1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6 7 define i8 @const_s8() { ret i8 42 } 8 define i16 @const_s16() { ret i16 42 } 9 define i32 @const_s32() { ret i32 42 } 10 define i64 @const_s64() { ret i64 1234567890123 } 11 define i32 @const_s32_zero() { ret i32 0 } 12 define i64 @const_s64_zero() { ret i64 0 } 13 define ptr @const_p0_0() { ret ptr null } 14 15 define i32 @fconst_s32() { ret i32 42 } 16 define i64 @fconst_s64() { ret i64 1234567890123 } 17 define float @fconst_s32_0() { ret float 0.0 } 18 define double @fconst_s64_0() { ret double 0.0 } 19 20 define void @optnone_i64() optnone noinline { ret void } 21 define void @opt_i64() { ret void } 22... 23 24--- 25name: const_s8 26legalized: true 27regBankSelected: true 28body: | 29 bb.0: 30 ; CHECK-LABEL: name: const_s8 31 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42 32 ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]] 33 ; CHECK: $w0 = COPY [[COPY]] 34 %0:gpr(s8) = G_CONSTANT i8 42 35 %1:gpr(s32) = G_ANYEXT %0(s8) 36 $w0 = COPY %1(s32) 37... 38 39--- 40name: const_s16 41legalized: true 42regBankSelected: true 43body: | 44 bb.0: 45 ; CHECK-LABEL: name: const_s16 46 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42 47 ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]] 48 ; CHECK: $w0 = COPY [[COPY]] 49 %0:gpr(s16) = G_CONSTANT i16 42 50 %1:gpr(s32) = G_ANYEXT %0(s16) 51 $w0 = COPY %1(s32) 52... 53 54--- 55name: const_s32 56legalized: true 57regBankSelected: true 58registers: 59 - { id: 0, class: gpr } 60 61body: | 62 bb.0: 63 ; CHECK-LABEL: name: const_s32 64 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42 65 ; CHECK: $w0 = COPY [[MOVi32imm]] 66 %0(s32) = G_CONSTANT i32 42 67 $w0 = COPY %0(s32) 68... 69 70--- 71name: const_s64 72legalized: true 73regBankSelected: true 74registers: 75 - { id: 0, class: gpr } 76 77body: | 78 bb.0: 79 ; CHECK-LABEL: name: const_s64 80 ; CHECK: [[MOVi64imm:%[0-9]+]]:gpr64 = MOVi64imm 1234567890123 81 ; CHECK: $x0 = COPY [[MOVi64imm]] 82 %0(s64) = G_CONSTANT i64 1234567890123 83 $x0 = COPY %0(s64) 84... 85 86--- 87name: const_s32_zero 88legalized: true 89regBankSelected: true 90registers: 91 - { id: 0, class: gpr } 92 93body: | 94 bb.0: 95 ; CHECK-LABEL: name: const_s32_zero 96 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr 97 ; CHECK: $w0 = COPY [[COPY]] 98 %0(s32) = G_CONSTANT i32 0 99 $w0 = COPY %0(s32) 100... 101 102--- 103name: const_s64_zero 104legalized: true 105regBankSelected: true 106registers: 107 - { id: 0, class: gpr } 108 109body: | 110 bb.0: 111 ; CHECK-LABEL: name: const_s64_zero 112 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $xzr 113 ; CHECK: $x0 = COPY [[COPY]] 114 %0(s64) = G_CONSTANT i64 0 115 $x0 = COPY %0(s64) 116... 117 118--- 119name: const_p0_0 120legalized: true 121regBankSelected: true 122body: | 123 bb.0: 124 ; CHECK-LABEL: name: const_p0_0 125 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $xzr 126 ; CHECK: $x0 = COPY [[COPY]] 127 %0:gpr(p0) = G_CONSTANT i64 0 128 $x0 = COPY %0 129... 130 131--- 132name: fconst_s32 133legalized: true 134regBankSelected: true 135registers: 136 - { id: 0, class: fpr } 137 138body: | 139 bb.0: 140 ; CHECK-LABEL: name: fconst_s32 141 ; CHECK: [[FMOVSi:%[0-9]+]]:fpr32 = FMOVSi 12 142 ; CHECK: $s0 = COPY [[FMOVSi]] 143 %0(s32) = G_FCONSTANT float 3.5 144 $s0 = COPY %0(s32) 145... 146 147--- 148name: fconst_s64 149legalized: true 150regBankSelected: true 151registers: 152 - { id: 0, class: fpr } 153 154body: | 155 bb.0: 156 ; CHECK-LABEL: name: fconst_s64 157 ; CHECK: [[FMOVDi:%[0-9]+]]:fpr64 = FMOVDi 112 158 ; CHECK: $d0 = COPY [[FMOVDi]] 159 %0(s64) = G_FCONSTANT double 1.0 160 $d0 = COPY %0(s64) 161... 162 163--- 164name: fconst_s32_0 165legalized: true 166regBankSelected: true 167registers: 168 - { id: 0, class: fpr } 169 170body: | 171 bb.0: 172 ; CHECK-LABEL: name: fconst_s32_0 173 ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0 174 ; CHECK: $s0 = COPY [[FMOVS0_]] 175 %0(s32) = G_FCONSTANT float 0.0 176 $s0 = COPY %0(s32) 177... 178 179--- 180name: fconst_s64_0 181legalized: true 182regBankSelected: true 183registers: 184 - { id: 0, class: fpr } 185 186body: | 187 bb.0: 188 ; CHECK-LABEL: name: fconst_s64_0 189 ; CHECK: [[FMOVD0_:%[0-9]+]]:fpr64 = FMOVD0 190 ; CHECK: $x0 = COPY [[FMOVD0_]] 191 %0(s64) = G_FCONSTANT double 0.0 192 $x0 = COPY %0(s64) 193... 194--- 195name: optnone_i64 196legalized: true 197regBankSelected: true 198body: | 199 bb.0: 200 ; CHECK-LABEL: name: optnone_i64 201 ; CHECK: [[MOVi64imm:%[0-9]+]]:gpr64 = MOVi64imm 42 202 ; CHECK: $x0 = COPY [[MOVi64imm]] 203 ; CHECK: RET_ReallyLR implicit $x0 204 %0:gpr(s64) = G_CONSTANT i64 42 205 $x0 = COPY %0(s64) 206 RET_ReallyLR implicit $x0 207... 208--- 209name: opt_i64 210legalized: true 211regBankSelected: true 212body: | 213 bb.0: 214 ; CHECK-LABEL: name: opt_i64 215 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42 216 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32 217 ; CHECK: $x0 = COPY [[SUBREG_TO_REG]] 218 ; CHECK: RET_ReallyLR implicit $x0 219 %0:gpr(s64) = G_CONSTANT i64 42 220 $x0 = COPY %0(s64) 221 RET_ReallyLR implicit $x0 222... 223