xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-cbz.mir (revision 02769f2b3fdebb5066d7a973b171d2873a804560)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            cbz_s32
6legalized:       true
7regBankSelected: true
8
9body:             |
10  ; CHECK-LABEL: name: cbz_s32
11  ; CHECK: bb.0:
12  ; CHECK-NEXT:   successors: %bb.0(0x40000000), %bb.1(0x40000000)
13  ; CHECK-NEXT:   liveins: $w0
14  ; CHECK-NEXT: {{  $}}
15  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr32 = COPY $w0
16  ; CHECK-NEXT:   CBZW [[COPY]], %bb.1
17  ; CHECK-NEXT:   B %bb.0
18  ; CHECK-NEXT: {{  $}}
19  ; CHECK-NEXT: bb.1:
20  bb.0:
21    liveins: $w0
22    successors: %bb.0, %bb.1
23
24    %0:gpr(s32) = COPY $w0
25    %1:gpr(s32) = G_CONSTANT i32 0
26    %2:gpr(s32) = G_ICMP intpred(eq), %0, %1
27    G_BRCOND %2, %bb.1
28    G_BR %bb.0
29
30  bb.1:
31...
32
33---
34name:            cbz_s64
35legalized:       true
36regBankSelected: true
37
38body:             |
39  ; CHECK-LABEL: name: cbz_s64
40  ; CHECK: bb.0:
41  ; CHECK-NEXT:   successors: %bb.0(0x40000000), %bb.1(0x40000000)
42  ; CHECK-NEXT:   liveins: $x0
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x0
45  ; CHECK-NEXT:   CBZX [[COPY]], %bb.1
46  ; CHECK-NEXT:   B %bb.0
47  ; CHECK-NEXT: {{  $}}
48  ; CHECK-NEXT: bb.1:
49  bb.0:
50    liveins: $x0
51    successors: %bb.0, %bb.1
52
53    %0:gpr(s64) = COPY $x0
54    %1:gpr(s64) = G_CONSTANT i64 0
55    %2:gpr(s32) = G_ICMP intpred(eq), %0, %1
56    G_BRCOND %2, %bb.1
57    G_BR %bb.0
58
59  bb.1:
60...
61
62---
63name:            cbnz_s32
64legalized:       true
65regBankSelected: true
66
67body:             |
68  ; CHECK-LABEL: name: cbnz_s32
69  ; CHECK: bb.0:
70  ; CHECK-NEXT:   successors: %bb.0(0x40000000), %bb.1(0x40000000)
71  ; CHECK-NEXT:   liveins: $w0
72  ; CHECK-NEXT: {{  $}}
73  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr32 = COPY $w0
74  ; CHECK-NEXT:   CBNZW [[COPY]], %bb.1
75  ; CHECK-NEXT:   B %bb.0
76  ; CHECK-NEXT: {{  $}}
77  ; CHECK-NEXT: bb.1:
78  bb.0:
79    liveins: $w0
80    successors: %bb.0, %bb.1
81
82    %0:gpr(s32) = COPY $w0
83    %1:gpr(s32) = G_CONSTANT i32 0
84    %2:gpr(s32) = G_ICMP intpred(ne), %0, %1
85    G_BRCOND %2, %bb.1
86    G_BR %bb.0
87
88  bb.1:
89...
90
91---
92name:            cbnz_s64
93legalized:       true
94regBankSelected: true
95
96body:             |
97  ; CHECK-LABEL: name: cbnz_s64
98  ; CHECK: bb.0:
99  ; CHECK-NEXT:   successors: %bb.0(0x40000000), %bb.1(0x40000000)
100  ; CHECK-NEXT:   liveins: $x0
101  ; CHECK-NEXT: {{  $}}
102  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x0
103  ; CHECK-NEXT:   CBNZX [[COPY]], %bb.1
104  ; CHECK-NEXT:   B %bb.0
105  ; CHECK-NEXT: {{  $}}
106  ; CHECK-NEXT: bb.1:
107  bb.0:
108    liveins: $x0
109    successors: %bb.0, %bb.1
110
111    %0:gpr(s64) = COPY $x0
112    %1:gpr(s64) = G_CONSTANT i64 0
113    %2:gpr(s32) = G_ICMP intpred(ne), %0, %1
114    G_BRCOND %2, %bb.1
115    G_BR %bb.0
116
117  bb.1:
118...
119---
120name:            test_rhs_inttoptr
121alignment:       4
122legalized:       true
123regBankSelected: true
124tracksRegLiveness: true
125body:             |
126  ; CHECK-LABEL: name: test_rhs_inttoptr
127  ; CHECK: bb.0:
128  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
129  ; CHECK-NEXT:   liveins: $x0
130  ; CHECK-NEXT: {{  $}}
131  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64common = COPY $x0
132  ; CHECK-NEXT:   CBZX [[COPY]], %bb.2
133  ; CHECK-NEXT: {{  $}}
134  ; CHECK-NEXT: bb.1:
135  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
136  ; CHECK-NEXT: {{  $}}
137  ; CHECK-NEXT:   STRXui $xzr, [[COPY]], 0 :: (store (s64))
138  ; CHECK-NEXT: {{  $}}
139  ; CHECK-NEXT: bb.2:
140  ; CHECK-NEXT:   RET_ReallyLR
141  bb.1:
142    successors: %bb.2, %bb.3
143    liveins: $x0
144
145    %0:gpr(p0) = COPY $x0
146    %2:gpr(s64) = G_CONSTANT i64 0
147    %1:gpr(p0) = G_INTTOPTR %2(s64)
148    %4:gpr(s32) = G_ICMP intpred(eq), %0(p0), %1
149    G_BRCOND %4, %bb.3
150
151  bb.2:
152    %5:gpr(s64) = G_CONSTANT i64 0
153    G_STORE %5(s64), %0(p0) :: (store (s64))
154
155  bb.3:
156    RET_ReallyLR
157
158...
159---
160name:            test_rhs_unknown
161alignment:       4
162legalized:       true
163regBankSelected: true
164tracksRegLiveness: true
165body:             |
166  ; CHECK-LABEL: name: test_rhs_unknown
167  ; CHECK: bb.0:
168  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
169  ; CHECK-NEXT:   liveins: $x0
170  ; CHECK-NEXT: {{  $}}
171  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
172  ; CHECK-NEXT:   [[LDRXui:%[0-9]+]]:gpr64common = LDRXui [[COPY]], 0 :: (load (s64))
173  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[LDRXui]], 42, 0, implicit-def $nzcv
174  ; CHECK-NEXT:   Bcc 0, %bb.2, implicit $nzcv
175  ; CHECK-NEXT: {{  $}}
176  ; CHECK-NEXT: bb.1:
177  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
178  ; CHECK-NEXT: {{  $}}
179  ; CHECK-NEXT:   STRXui $xzr, [[COPY]], 0 :: (store (s64))
180  ; CHECK-NEXT: {{  $}}
181  ; CHECK-NEXT: bb.2:
182  ; CHECK-NEXT:   RET_ReallyLR
183  bb.1:
184    successors: %bb.2, %bb.3
185    liveins: $x0
186
187    %0:gpr(p0) = COPY $x0
188    %2:gpr(s64) = G_CONSTANT i64 42
189    %4:gpr(s64) = G_CONSTANT i64 0
190    %1:gpr(s64) = G_LOAD %0(p0) :: (load (s64))
191    %5:gpr(s32) = G_ICMP intpred(eq), %1(s64), %2
192    G_BRCOND %5, %bb.3
193
194  bb.2:
195    %6:gpr(s64) = G_CONSTANT i64 0
196    G_STORE %6(s64), %0(p0) :: (store (s64))
197
198  bb.3:
199    RET_ReallyLR
200
201
202