xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-bit.mir (revision 2861ec84fce21c2ec9f33849e38661b9f4fe62e2)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4...
5---
6name:            BITv8i8_v2s32
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10body:             |
11  bb.0:
12    liveins: $d0, $d1, $d2
13
14    ; CHECK-LABEL: name: BITv8i8_v2s32
15    ; CHECK: liveins: $d0, $d1, $d2
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: %lhs:fpr64 = COPY $d0
18    ; CHECK-NEXT: %mhs:fpr64 = COPY $d1
19    ; CHECK-NEXT: %rhs:fpr64 = COPY $d2
20    ; CHECK-NEXT: %bit:fpr64 = BSPv8i8 %lhs, %mhs, %rhs
21    ; CHECK-NEXT: $d0 = COPY %bit
22    ; CHECK-NEXT: RET_ReallyLR implicit $d0
23    %lhs:fpr(<2 x s32>) = COPY $d0
24    %mhs:fpr(<2 x s32>) = COPY $d1
25    %rhs:fpr(<2 x s32>) = COPY $d2
26    %bit:fpr(<2 x s32>) = G_BSP %lhs, %mhs, %rhs
27    $d0 = COPY %bit(<2 x s32>)
28    RET_ReallyLR implicit $d0
29
30...
31---
32name:            BITv8i8_v4s16
33legalized:       true
34regBankSelected: true
35tracksRegLiveness: true
36body:             |
37  bb.0:
38    liveins: $d0, $d1, $d2
39    ; CHECK-LABEL: name: BITv8i8_v4s16
40    ; CHECK: liveins: $d0, $d1, $d2
41    ; CHECK-NEXT: {{  $}}
42    ; CHECK-NEXT: %lhs:fpr64 = COPY $d0
43    ; CHECK-NEXT: %mhs:fpr64 = COPY $d1
44    ; CHECK-NEXT: %rhs:fpr64 = COPY $d2
45    ; CHECK-NEXT: %bit:fpr64 = BSPv8i8 %lhs, %mhs, %rhs
46    ; CHECK-NEXT: $d0 = COPY %bit
47    ; CHECK-NEXT: RET_ReallyLR implicit $d0
48    %lhs:fpr(<4 x s16>) = COPY $d0
49    %mhs:fpr(<4 x s16>) = COPY $d1
50    %rhs:fpr(<4 x s16>) = COPY $d2
51    %bit:fpr(<4 x s16>) = G_BSP %lhs, %mhs, %rhs
52    $d0 = COPY %bit(<4 x s16>)
53    RET_ReallyLR implicit $d0
54
55...
56---
57name:            BITv16i8_v2s64
58legalized:       true
59regBankSelected: true
60tracksRegLiveness: true
61body:             |
62  bb.0:
63    liveins: $q0, $q1, $q2
64
65    ; CHECK-LABEL: name: BITv16i8_v2s64
66    ; CHECK: liveins: $q0, $q1, $q2
67    ; CHECK-NEXT: {{  $}}
68    ; CHECK-NEXT: %lhs:fpr128 = COPY $q0
69    ; CHECK-NEXT: %mhs:fpr128 = COPY $q1
70    ; CHECK-NEXT: %rhs:fpr128 = COPY $q2
71    ; CHECK-NEXT: %bit:fpr128 = BSPv16i8 %lhs, %mhs, %rhs
72    ; CHECK-NEXT: $q0 = COPY %bit
73    ; CHECK-NEXT: RET_ReallyLR implicit $q0
74    %lhs:fpr(<2 x s64>) = COPY $q0
75    %mhs:fpr(<2 x s64>) = COPY $q1
76    %rhs:fpr(<2 x s64>) = COPY $q2
77    %bit:fpr(<2 x s64>) = G_BSP %lhs, %mhs, %rhs
78    $q0 = COPY %bit(<2 x s64>)
79    RET_ReallyLR implicit $q0
80
81...
82---
83name:            BITv16i8_v4s32
84legalized:       true
85regBankSelected: true
86tracksRegLiveness: true
87body:             |
88  bb.0:
89    liveins: $q0, $q1, $q2
90
91    ; CHECK-LABEL: name: BITv16i8_v4s32
92    ; CHECK: liveins: $q0, $q1, $q2
93    ; CHECK-NEXT: {{  $}}
94    ; CHECK-NEXT: %lhs:fpr128 = COPY $q0
95    ; CHECK-NEXT: %mhs:fpr128 = COPY $q1
96    ; CHECK-NEXT: %rhs:fpr128 = COPY $q2
97    ; CHECK-NEXT: %bit:fpr128 = BSPv16i8 %lhs, %mhs, %rhs
98    ; CHECK-NEXT: $q0 = COPY %bit
99    ; CHECK-NEXT: RET_ReallyLR implicit $q0
100    %lhs:fpr(<4 x s32>) = COPY $q0
101    %mhs:fpr(<4 x s32>) = COPY $q1
102    %rhs:fpr(<4 x s32>) = COPY $q2
103    %bit:fpr(<4 x s32>) = G_BSP %lhs, %mhs, %rhs
104    $q0 = COPY %bit(<4 x s32>)
105    RET_ReallyLR implicit $q0
106
107...
108---
109name:            BITv16i8_v8s16
110legalized:       true
111regBankSelected: true
112tracksRegLiveness: true
113body:             |
114  bb.0:
115    liveins: $q0, $q1, $q2
116
117    ; CHECK-LABEL: name: BITv16i8_v8s16
118    ; CHECK: liveins: $q0, $q1, $q2
119    ; CHECK-NEXT: {{  $}}
120    ; CHECK-NEXT: %lhs:fpr128 = COPY $q0
121    ; CHECK-NEXT: %mhs:fpr128 = COPY $q1
122    ; CHECK-NEXT: %rhs:fpr128 = COPY $q2
123    ; CHECK-NEXT: %bit:fpr128 = BSPv16i8 %lhs, %mhs, %rhs
124    ; CHECK-NEXT: $q0 = COPY %bit
125    ; CHECK-NEXT: RET_ReallyLR implicit $q0
126    %lhs:fpr(<8 x s16>) = COPY $q0
127    %mhs:fpr(<8 x s16>) = COPY $q1
128    %rhs:fpr(<8 x s16>) = COPY $q2
129    %bit:fpr(<8 x s16>) = G_BSP %lhs, %mhs, %rhs
130    $q0 = COPY %bit(<8 x s16>)
131    RET_ReallyLR implicit $q0
132
133...
134---
135name:            BITv16i8_v16s8
136legalized:       true
137regBankSelected: true
138tracksRegLiveness: true
139body:             |
140  bb.0:
141    liveins: $q0, $q1, $q2
142
143    ; CHECK-LABEL: name: BITv16i8_v16s8
144    ; CHECK: liveins: $q0, $q1, $q2
145    ; CHECK-NEXT: {{  $}}
146    ; CHECK-NEXT: %lhs:fpr128 = COPY $q0
147    ; CHECK-NEXT: %mhs:fpr128 = COPY $q1
148    ; CHECK-NEXT: %rhs:fpr128 = COPY $q2
149    ; CHECK-NEXT: %bit:fpr128 = BSPv16i8 %lhs, %mhs, %rhs
150    ; CHECK-NEXT: $q0 = COPY %bit
151    ; CHECK-NEXT: RET_ReallyLR implicit $q0
152    %lhs:fpr(<16 x s8>) = COPY $q0
153    %mhs:fpr(<16 x s8>) = COPY $q1
154    %rhs:fpr(<16 x s8>) = COPY $q2
155    %bit:fpr(<16 x s8>) = G_BSP %lhs, %mhs, %rhs
156    $q0 = COPY %bit(<16 x s8>)
157    RET_ReallyLR implicit $q0
158