1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3--- | 4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" 5 target triple = "aarch64" 6 7 define i8 @load_acq_i8(ptr %ptr) { 8 %v = load atomic i8, ptr %ptr acquire, align 8 9 ret i8 %v 10 } 11 12 define i32 @anyext_load_monotonic_i32() { 13 %v = load atomic i32, ptr null monotonic, align 4 14 ret i32 %v 15 } 16 17... 18--- 19name: load_acq_i8 20alignment: 4 21legalized: true 22regBankSelected: true 23tracksRegLiveness: true 24liveins: 25 - { reg: '$x0' } 26machineFunctionInfo: {} 27body: | 28 bb.1: 29 liveins: $x0 30 31 ; CHECK-LABEL: name: load_acq_i8 32 ; CHECK: liveins: $x0 33 ; CHECK-NEXT: {{ $}} 34 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 35 ; CHECK-NEXT: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8) 36 ; CHECK-NEXT: $w0 = COPY [[LDARB]] 37 ; CHECK-NEXT: RET_ReallyLR implicit $w0 38 %0:gpr(p0) = COPY $x0 39 %2:gpr(s32) = G_LOAD %0(p0) :: (load acquire (s8) from %ir.ptr, align 8) 40 $w0 = COPY %2(s32) 41 RET_ReallyLR implicit $w0 42 43... 44--- 45name: anyext_load_monotonic_i32 46legalized: true 47regBankSelected: true 48tracksRegLiveness: true 49body: | 50 bb.1: 51 ; CHECK-LABEL: name: anyext_load_monotonic_i32 52 ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $xzr 53 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load monotonic (s32) from `ptr null`) 54 ; CHECK-NEXT: %ld:gpr64all = SUBREG_TO_REG 0, [[LDRWui]], %subreg.sub_32 55 ; CHECK-NEXT: $x0 = COPY %ld 56 ; CHECK-NEXT: RET_ReallyLR implicit $x0 57 %1:gpr(p0) = G_CONSTANT i64 0 58 %ld:gpr(s64) = G_LOAD %1(p0) :: (load monotonic (s32) from `ptr null`) 59 $x0 = COPY %ld(s64) 60 RET_ReallyLR implicit $x0 61 62... 63