1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect %s -o - | FileCheck %s 3 4# Check the default mappings for various instructions. 5 6--- | 7 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 8 9 define void @test_add_s32() { ret void } 10 define void @test_add_v4s32() { ret void } 11 define void @test_sub_s32() { ret void } 12 define void @test_sub_v4s32() { ret void } 13 define void @test_mul_s32() { ret void } 14 define void @test_mul_v4s32() { ret void } 15 16 define void @test_and_s32() { ret void } 17 define void @test_and_v4s32() { ret void } 18 define void @test_or_s32() { ret void } 19 define void @test_or_v4s32() { ret void } 20 define void @test_xor_s32() { ret void } 21 define void @test_xor_v4s32() { ret void } 22 23 define void @test_shl_s32() { ret void } 24 define void @test_shl_v4s32() { ret void } 25 define void @test_lshr_s32() { ret void } 26 define void @test_ashr_s32() { ret void } 27 28 define void @test_sdiv_s32() { ret void } 29 define void @test_udiv_s32() { ret void } 30 31 define void @test_anyext_s64_s32() { ret void } 32 define void @test_sext_s64_s32() { ret void } 33 define void @test_zext_s64_s32() { ret void } 34 define void @test_trunc_s32_s64() { ret void } 35 36 define void @test_constant_s32() { ret void } 37 define void @test_constant_p0() { ret void } 38 39 define void @test_icmp_s32() { ret void } 40 define void @test_icmp_p0() { ret void } 41 42 define void @test_frame_index_p0() { 43 %ptr0 = alloca i64 44 ret void 45 } 46 47 define void @test_ptrtoint_s64_p0() { ret void } 48 define void @test_inttoptr_p0_s64() { ret void } 49 50 define void @test_load_s32_p0() { ret void } 51 define void @test_store_s32_p0() { ret void } 52 53 define void @test_fadd_s32() { ret void } 54 define void @test_fsub_s32() { ret void } 55 define void @test_fmul_s32() { ret void } 56 define void @test_fdiv_s32() { ret void } 57 58 define void @test_fpext_s64_s32() { ret void } 59 define void @test_fptrunc_s32_s64() { ret void } 60 61 define void @test_fconstant_s32() { ret void } 62 define void @test_fneg_s32() { ret void } 63 64 define void @test_fcmp_s32() { ret void } 65 66 define void @test_sitofp_s64_s32() { ret void } 67 define void @test_sitofp_v4s32() { ret void } 68 define void @test_uitofp_s32_s64() { ret void } 69 define void @test_uitofp_v4s32() { ret void } 70 71 define void @test_fptosi_s64_s32() { ret void } 72 define void @test_fptosi_v4s32() { ret void } 73 define void @test_fptoui_s32_s64() { ret void } 74 define void @test_fptoui_v4s32() { ret void } 75 76 define void @test_gphi_ptr() { ret void } 77 78 define void @test_restricted_tail_call() { ret void } 79 80... 81 82--- 83name: test_add_s32 84legalized: true 85registers: 86 - { id: 0, class: _ } 87 - { id: 1, class: _ } 88body: | 89 bb.0: 90 liveins: $w0 91 ; CHECK-LABEL: name: test_add_s32 92 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 93 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY]], [[COPY]] 94 %0(s32) = COPY $w0 95 %1(s32) = G_ADD %0, %0 96... 97 98--- 99name: test_add_v4s32 100legalized: true 101registers: 102 - { id: 0, class: _ } 103 - { id: 1, class: _ } 104body: | 105 bb.0: 106 liveins: $q0 107 ; CHECK-LABEL: name: test_add_v4s32 108 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 109 ; CHECK: [[ADD:%[0-9]+]]:fpr(<4 x s32>) = G_ADD [[COPY]], [[COPY]] 110 %0(<4 x s32>) = COPY $q0 111 %1(<4 x s32>) = G_ADD %0, %0 112... 113 114--- 115name: test_sub_s32 116legalized: true 117registers: 118 - { id: 0, class: _ } 119 - { id: 1, class: _ } 120body: | 121 bb.0: 122 liveins: $w0 123 ; CHECK-LABEL: name: test_sub_s32 124 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 125 ; CHECK: [[SUB:%[0-9]+]]:gpr(s32) = G_SUB [[COPY]], [[COPY]] 126 %0(s32) = COPY $w0 127 %1(s32) = G_SUB %0, %0 128... 129 130--- 131name: test_sub_v4s32 132legalized: true 133registers: 134 - { id: 0, class: _ } 135 - { id: 1, class: _ } 136body: | 137 bb.0: 138 liveins: $q0 139 ; CHECK-LABEL: name: test_sub_v4s32 140 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 141 ; CHECK: [[SUB:%[0-9]+]]:fpr(<4 x s32>) = G_SUB [[COPY]], [[COPY]] 142 %0(<4 x s32>) = COPY $q0 143 %1(<4 x s32>) = G_SUB %0, %0 144... 145 146--- 147name: test_mul_s32 148legalized: true 149registers: 150 - { id: 0, class: _ } 151 - { id: 1, class: _ } 152body: | 153 bb.0: 154 liveins: $w0 155 ; CHECK-LABEL: name: test_mul_s32 156 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 157 ; CHECK: [[MUL:%[0-9]+]]:gpr(s32) = G_MUL [[COPY]], [[COPY]] 158 %0(s32) = COPY $w0 159 %1(s32) = G_MUL %0, %0 160... 161 162--- 163name: test_mul_v4s32 164legalized: true 165registers: 166 - { id: 0, class: _ } 167 - { id: 1, class: _ } 168body: | 169 bb.0: 170 liveins: $q0 171 ; CHECK-LABEL: name: test_mul_v4s32 172 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 173 ; CHECK: [[MUL:%[0-9]+]]:fpr(<4 x s32>) = G_MUL [[COPY]], [[COPY]] 174 %0(<4 x s32>) = COPY $q0 175 %1(<4 x s32>) = G_MUL %0, %0 176... 177 178--- 179name: test_and_s32 180legalized: true 181registers: 182 - { id: 0, class: _ } 183 - { id: 1, class: _ } 184body: | 185 bb.0: 186 liveins: $w0 187 ; CHECK-LABEL: name: test_and_s32 188 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 189 ; CHECK: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[COPY]], [[COPY]] 190 %0(s32) = COPY $w0 191 %1(s32) = G_AND %0, %0 192... 193 194--- 195name: test_and_v4s32 196legalized: true 197registers: 198 - { id: 0, class: _ } 199 - { id: 1, class: _ } 200body: | 201 bb.0: 202 liveins: $q0 203 ; CHECK-LABEL: name: test_and_v4s32 204 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 205 ; CHECK: [[AND:%[0-9]+]]:fpr(<4 x s32>) = G_AND [[COPY]], [[COPY]] 206 %0(<4 x s32>) = COPY $q0 207 %1(<4 x s32>) = G_AND %0, %0 208... 209 210--- 211name: test_or_s32 212legalized: true 213registers: 214 - { id: 0, class: _ } 215 - { id: 1, class: _ } 216body: | 217 bb.0: 218 liveins: $w0 219 ; CHECK-LABEL: name: test_or_s32 220 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 221 ; CHECK: [[OR:%[0-9]+]]:gpr(s32) = G_OR [[COPY]], [[COPY]] 222 %0(s32) = COPY $w0 223 %1(s32) = G_OR %0, %0 224... 225 226--- 227name: test_or_v4s32 228legalized: true 229registers: 230 - { id: 0, class: _ } 231 - { id: 1, class: _ } 232body: | 233 bb.0: 234 liveins: $q0 235 ; CHECK-LABEL: name: test_or_v4s32 236 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 237 ; CHECK: [[OR:%[0-9]+]]:fpr(<4 x s32>) = G_OR [[COPY]], [[COPY]] 238 %0(<4 x s32>) = COPY $q0 239 %1(<4 x s32>) = G_OR %0, %0 240... 241 242--- 243name: test_xor_s32 244legalized: true 245registers: 246 - { id: 0, class: _ } 247 - { id: 1, class: _ } 248body: | 249 bb.0: 250 liveins: $w0 251 ; CHECK-LABEL: name: test_xor_s32 252 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 253 ; CHECK: [[XOR:%[0-9]+]]:gpr(s32) = G_XOR [[COPY]], [[COPY]] 254 %0(s32) = COPY $w0 255 %1(s32) = G_XOR %0, %0 256... 257 258--- 259name: test_xor_v4s32 260legalized: true 261registers: 262 - { id: 0, class: _ } 263 - { id: 1, class: _ } 264body: | 265 bb.0: 266 liveins: $q0 267 ; CHECK-LABEL: name: test_xor_v4s32 268 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 269 ; CHECK: [[XOR:%[0-9]+]]:fpr(<4 x s32>) = G_XOR [[COPY]], [[COPY]] 270 %0(<4 x s32>) = COPY $q0 271 %1(<4 x s32>) = G_XOR %0, %0 272... 273 274--- 275name: test_shl_s32 276legalized: true 277registers: 278 - { id: 0, class: _ } 279 - { id: 1, class: _ } 280body: | 281 bb.0: 282 liveins: $w0 283 ; CHECK-LABEL: name: test_shl_s32 284 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 285 ; CHECK: [[SHL:%[0-9]+]]:gpr(s32) = G_SHL [[COPY]], [[COPY]](s32) 286 %0(s32) = COPY $w0 287 %1(s32) = G_SHL %0, %0 288... 289 290--- 291name: test_shl_v4s32 292legalized: true 293registers: 294 - { id: 0, class: _ } 295 - { id: 1, class: _ } 296body: | 297 bb.0: 298 liveins: $q0 299 ; CHECK-LABEL: name: test_shl_v4s32 300 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 301 ; CHECK: [[SHL:%[0-9]+]]:fpr(<4 x s32>) = G_SHL [[COPY]], [[COPY]](<4 x s32>) 302 %0(<4 x s32>) = COPY $q0 303 %1(<4 x s32>) = G_SHL %0, %0 304... 305 306--- 307name: test_lshr_s32 308legalized: true 309registers: 310 - { id: 0, class: _ } 311 - { id: 1, class: _ } 312body: | 313 bb.0: 314 liveins: $w0 315 ; CHECK-LABEL: name: test_lshr_s32 316 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 317 ; CHECK: [[LSHR:%[0-9]+]]:gpr(s32) = G_LSHR [[COPY]], [[COPY]](s32) 318 %0(s32) = COPY $w0 319 %1(s32) = G_LSHR %0, %0 320... 321 322--- 323name: test_ashr_s32 324legalized: true 325registers: 326 - { id: 0, class: _ } 327 - { id: 1, class: _ } 328body: | 329 bb.0: 330 liveins: $w0 331 ; CHECK-LABEL: name: test_ashr_s32 332 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 333 ; CHECK: [[ASHR:%[0-9]+]]:gpr(s32) = G_ASHR [[COPY]], [[COPY]](s32) 334 %0(s32) = COPY $w0 335 %1(s32) = G_ASHR %0, %0 336... 337 338--- 339name: test_sdiv_s32 340legalized: true 341registers: 342 - { id: 0, class: _ } 343 - { id: 1, class: _ } 344body: | 345 bb.0: 346 liveins: $w0 347 ; CHECK-LABEL: name: test_sdiv_s32 348 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 349 ; CHECK: [[SDIV:%[0-9]+]]:gpr(s32) = G_SDIV [[COPY]], [[COPY]] 350 %0(s32) = COPY $w0 351 %1(s32) = G_SDIV %0, %0 352... 353 354--- 355name: test_udiv_s32 356legalized: true 357registers: 358 - { id: 0, class: _ } 359 - { id: 1, class: _ } 360body: | 361 bb.0: 362 liveins: $w0 363 ; CHECK-LABEL: name: test_udiv_s32 364 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 365 ; CHECK: [[UDIV:%[0-9]+]]:gpr(s32) = G_UDIV [[COPY]], [[COPY]] 366 %0(s32) = COPY $w0 367 %1(s32) = G_UDIV %0, %0 368... 369 370--- 371name: test_anyext_s64_s32 372legalized: true 373registers: 374 - { id: 0, class: _ } 375 - { id: 1, class: _ } 376body: | 377 bb.0: 378 liveins: $w0 379 ; CHECK-LABEL: name: test_anyext_s64_s32 380 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 381 ; CHECK: [[ANYEXT:%[0-9]+]]:gpr(s64) = G_ANYEXT [[COPY]](s32) 382 %0(s32) = COPY $w0 383 %1(s64) = G_ANYEXT %0 384... 385 386--- 387name: test_sext_s64_s32 388legalized: true 389registers: 390 - { id: 0, class: _ } 391 - { id: 1, class: _ } 392body: | 393 bb.0: 394 liveins: $w0 395 ; CHECK-LABEL: name: test_sext_s64_s32 396 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 397 ; CHECK: [[SEXT:%[0-9]+]]:gpr(s64) = G_SEXT [[COPY]](s32) 398 %0(s32) = COPY $w0 399 %1(s64) = G_SEXT %0 400... 401 402--- 403name: test_zext_s64_s32 404legalized: true 405registers: 406 - { id: 0, class: _ } 407 - { id: 1, class: _ } 408body: | 409 bb.0: 410 liveins: $w0 411 ; CHECK-LABEL: name: test_zext_s64_s32 412 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 413 ; CHECK: [[ZEXT:%[0-9]+]]:gpr(s64) = G_ZEXT [[COPY]](s32) 414 %0(s32) = COPY $w0 415 %1(s64) = G_ZEXT %0 416... 417 418--- 419name: test_trunc_s32_s64 420legalized: true 421registers: 422 - { id: 0, class: _ } 423 - { id: 1, class: _ } 424body: | 425 bb.0: 426 liveins: $x0 427 ; CHECK-LABEL: name: test_trunc_s32_s64 428 ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 429 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s32) = G_TRUNC [[COPY]](s64) 430 %0(s64) = COPY $x0 431 %1(s32) = G_TRUNC %0 432... 433 434--- 435name: test_constant_s32 436legalized: true 437registers: 438 - { id: 0, class: _ } 439body: | 440 bb.0: 441 ; CHECK-LABEL: name: test_constant_s32 442 ; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 123 443 %0(s32) = G_CONSTANT i32 123 444... 445 446--- 447name: test_constant_p0 448legalized: true 449registers: 450 - { id: 0, class: _ } 451body: | 452 bb.0: 453 ; CHECK-LABEL: name: test_constant_p0 454 ; CHECK: [[C:%[0-9]+]]:gpr(p0) = G_CONSTANT i64 0 455 %0(p0) = G_CONSTANT i64 0 456... 457 458--- 459name: test_icmp_s32 460legalized: true 461registers: 462 - { id: 0, class: _ } 463 - { id: 1, class: _ } 464 - { id: 2, class: _ } 465body: | 466 bb.0: 467 liveins: $w0 468 ; CHECK-LABEL: name: test_icmp_s32 469 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 470 ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY]] 471 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) 472 %0(s32) = COPY $w0 473 %1(s32) = G_ICMP intpred(ne), %0, %0 474 %2(s1) = G_TRUNC %1(s32) 475... 476 477--- 478name: test_icmp_p0 479legalized: true 480registers: 481 - { id: 0, class: _ } 482 - { id: 1, class: _ } 483 - { id: 2, class: _ } 484body: | 485 bb.0: 486 liveins: $x0 487 ; CHECK-LABEL: name: test_icmp_p0 488 ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 489 ; CHECK: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[COPY]](p0), [[COPY]] 490 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32) 491 %0(p0) = COPY $x0 492 %1(s32) = G_ICMP intpred(ne), %0, %0 493 %2(s1) = G_TRUNC %1(s32) 494... 495 496--- 497name: test_frame_index_p0 498legalized: true 499registers: 500 - { id: 0, class: _ } 501stack: 502 - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 } 503body: | 504 bb.0: 505 ; CHECK-LABEL: name: test_frame_index_p0 506 ; CHECK: [[FRAME_INDEX:%[0-9]+]]:gpr(p0) = G_FRAME_INDEX %stack.0.ptr0 507 %0(p0) = G_FRAME_INDEX %stack.0.ptr0 508... 509 510--- 511name: test_ptrtoint_s64_p0 512legalized: true 513registers: 514 - { id: 0, class: _ } 515 - { id: 1, class: _ } 516body: | 517 bb.0: 518 liveins: $x0 519 ; CHECK-LABEL: name: test_ptrtoint_s64_p0 520 ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 521 ; CHECK: [[PTRTOINT:%[0-9]+]]:gpr(s64) = G_PTRTOINT [[COPY]](p0) 522 %0(p0) = COPY $x0 523 %1(s64) = G_PTRTOINT %0 524... 525 526--- 527name: test_inttoptr_p0_s64 528legalized: true 529registers: 530 - { id: 0, class: _ } 531 - { id: 1, class: _ } 532body: | 533 bb.0: 534 liveins: $x0 535 ; CHECK-LABEL: name: test_inttoptr_p0_s64 536 ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 537 ; CHECK: [[INTTOPTR:%[0-9]+]]:gpr(p0) = G_INTTOPTR [[COPY]](s64) 538 %0(s64) = COPY $x0 539 %1(p0) = G_INTTOPTR %0 540... 541 542--- 543name: test_load_s32_p0 544legalized: true 545registers: 546 - { id: 0, class: _ } 547 - { id: 1, class: _ } 548body: | 549 bb.0: 550 liveins: $x0 551 ; CHECK-LABEL: name: test_load_s32_p0 552 ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 553 ; CHECK: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32)) 554 %0(p0) = COPY $x0 555 %1(s32) = G_LOAD %0 :: (load (s32)) 556... 557 558--- 559name: test_store_s32_p0 560legalized: true 561registers: 562 - { id: 0, class: _ } 563 - { id: 1, class: _ } 564body: | 565 bb.0: 566 liveins: $x0, $w1 567 ; CHECK-LABEL: name: test_store_s32_p0 568 ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 569 ; CHECK: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1 570 ; CHECK: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32)) 571 %0(p0) = COPY $x0 572 %1(s32) = COPY $w1 573 G_STORE %1, %0 :: (store (s32)) 574... 575 576--- 577name: test_fadd_s32 578legalized: true 579registers: 580 - { id: 0, class: _ } 581 - { id: 1, class: _ } 582body: | 583 bb.0: 584 liveins: $s0 585 ; CHECK-LABEL: name: test_fadd_s32 586 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 587 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[COPY]], [[COPY]] 588 %0(s32) = COPY $s0 589 %1(s32) = G_FADD %0, %0 590... 591 592--- 593name: test_fsub_s32 594legalized: true 595registers: 596 - { id: 0, class: _ } 597 - { id: 1, class: _ } 598body: | 599 bb.0: 600 liveins: $s0 601 ; CHECK-LABEL: name: test_fsub_s32 602 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 603 ; CHECK: [[FSUB:%[0-9]+]]:fpr(s32) = G_FSUB [[COPY]], [[COPY]] 604 %0(s32) = COPY $s0 605 %1(s32) = G_FSUB %0, %0 606... 607 608--- 609name: test_fmul_s32 610legalized: true 611registers: 612 - { id: 0, class: _ } 613 - { id: 1, class: _ } 614body: | 615 bb.0: 616 liveins: $s0 617 ; CHECK-LABEL: name: test_fmul_s32 618 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 619 ; CHECK: [[FMUL:%[0-9]+]]:fpr(s32) = G_FMUL [[COPY]], [[COPY]] 620 %0(s32) = COPY $s0 621 %1(s32) = G_FMUL %0, %0 622... 623 624--- 625name: test_fdiv_s32 626legalized: true 627registers: 628 - { id: 0, class: _ } 629 - { id: 1, class: _ } 630body: | 631 bb.0: 632 liveins: $s0 633 ; CHECK-LABEL: name: test_fdiv_s32 634 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 635 ; CHECK: [[FDIV:%[0-9]+]]:fpr(s32) = G_FDIV [[COPY]], [[COPY]] 636 %0(s32) = COPY $s0 637 %1(s32) = G_FDIV %0, %0 638... 639 640--- 641name: test_fpext_s64_s32 642legalized: true 643registers: 644 - { id: 0, class: _ } 645 - { id: 1, class: _ } 646body: | 647 bb.0: 648 liveins: $s0 649 ; CHECK-LABEL: name: test_fpext_s64_s32 650 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 651 ; CHECK: [[FPEXT:%[0-9]+]]:fpr(s64) = G_FPEXT [[COPY]](s32) 652 %0(s32) = COPY $s0 653 %1(s64) = G_FPEXT %0 654... 655 656--- 657name: test_fptrunc_s32_s64 658legalized: true 659registers: 660 - { id: 0, class: _ } 661 - { id: 1, class: _ } 662body: | 663 bb.0: 664 liveins: $d0 665 ; CHECK-LABEL: name: test_fptrunc_s32_s64 666 ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY $d0 667 ; CHECK: [[FPTRUNC:%[0-9]+]]:fpr(s32) = G_FPTRUNC [[COPY]](s64) 668 %0(s64) = COPY $d0 669 %1(s32) = G_FPTRUNC %0 670... 671 672--- 673name: test_fconstant_s32 674legalized: true 675registers: 676 - { id: 0, class: _ } 677body: | 678 bb.0: 679 ; CHECK-LABEL: name: test_fconstant_s32 680 ; CHECK: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 1.000000e+00 681 %0(s32) = G_FCONSTANT float 1.0 682... 683 684--- 685name: test_fneg_s32 686legalized: true 687body: | 688 bb.0: 689 liveins: $s0 690 ; CHECK-LABEL: name: test_fneg_s32 691 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 692 ; CHECK: [[FNEG:%[0-9]+]]:fpr(s32) = G_FNEG [[COPY]] 693 %0:_(s32) = COPY $s0 694 %1:_(s32) = G_FNEG %0(s32) 695... 696 697--- 698name: test_fcmp_s32 699legalized: true 700registers: 701 - { id: 0, class: _ } 702 - { id: 1, class: _ } 703 - { id: 2, class: _ } 704body: | 705 bb.0: 706 liveins: $s0 707 ; CHECK-LABEL: name: test_fcmp_s32 708 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 709 ; CHECK: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(olt), [[COPY]](s32), [[COPY]] 710 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[FCMP]](s32) 711 %0(s32) = COPY $s0 712 %1(s32) = G_FCMP floatpred(olt), %0, %0 713 %2(s1) = G_TRUNC %1(s32) 714... 715 716--- 717name: test_sitofp_s64_s32 718legalized: true 719registers: 720 - { id: 0, class: _ } 721 - { id: 1, class: _ } 722body: | 723 bb.0: 724 liveins: $w0 725 ; CHECK-LABEL: name: test_sitofp_s64_s32 726 ; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 727 ; CHECK: [[SITOFP:%[0-9]+]]:fpr(s64) = G_SITOFP [[COPY]](s32) 728 %0(s32) = COPY $w0 729 %1(s64) = G_SITOFP %0 730... 731 732--- 733name: test_sitofp_v4s32 734legalized: true 735registers: 736 - { id: 0, class: _ } 737 - { id: 1, class: _ } 738body: | 739 bb.0: 740 liveins: $q0 741 ; CHECK-LABEL: name: test_sitofp_v4s32 742 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 743 ; CHECK: [[SITOFP:%[0-9]+]]:fpr(<4 x s32>) = G_SITOFP [[COPY]](<4 x s32>) 744 %0(<4 x s32>) = COPY $q0 745 %1(<4 x s32>) = G_SITOFP %0 746... 747 748--- 749name: test_uitofp_s32_s64 750legalized: true 751registers: 752 - { id: 0, class: _ } 753 - { id: 1, class: _ } 754body: | 755 bb.0: 756 liveins: $x0 757 ; CHECK-LABEL: name: test_uitofp_s32_s64 758 ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 759 ; CHECK: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[COPY]](s64) 760 %0(s64) = COPY $x0 761 %1(s32) = G_UITOFP %0 762... 763 764--- 765name: test_uitofp_v4s32 766legalized: true 767registers: 768 - { id: 0, class: _ } 769 - { id: 1, class: _ } 770body: | 771 bb.0: 772 liveins: $q0 773 ; CHECK-LABEL: name: test_uitofp_v4s32 774 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 775 ; CHECK: [[UITOFP:%[0-9]+]]:fpr(<4 x s32>) = G_UITOFP [[COPY]](<4 x s32>) 776 %0(<4 x s32>) = COPY $q0 777 %1(<4 x s32>) = G_UITOFP %0 778... 779 780--- 781name: test_fptosi_s64_s32 782legalized: true 783registers: 784 - { id: 0, class: _ } 785 - { id: 1, class: _ } 786body: | 787 bb.0: 788 liveins: $s0 789 ; CHECK-LABEL: name: test_fptosi_s64_s32 790 ; CHECK: [[COPY:%[0-9]+]]:fpr(s32) = COPY $s0 791 ; CHECK: [[FPTOSI:%[0-9]+]]:gpr(s64) = G_FPTOSI [[COPY]](s32) 792 %0(s32) = COPY $s0 793 %1(s64) = G_FPTOSI %0 794... 795 796--- 797name: test_fptosi_v4s32 798legalized: true 799registers: 800 - { id: 0, class: _ } 801 - { id: 1, class: _ } 802body: | 803 bb.0: 804 liveins: $q0 805 ; CHECK-LABEL: name: test_fptosi_v4s32 806 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 807 ; CHECK: [[FPTOSI:%[0-9]+]]:fpr(<4 x s32>) = G_FPTOSI [[COPY]](<4 x s32>) 808 %0(<4 x s32>) = COPY $q0 809 %1(<4 x s32>) = G_FPTOSI %0 810... 811 812--- 813name: test_fptoui_s32_s64 814legalized: true 815registers: 816 - { id: 0, class: _ } 817 - { id: 1, class: _ } 818body: | 819 bb.0: 820 liveins: $d0 821 ; CHECK-LABEL: name: test_fptoui_s32_s64 822 ; CHECK: [[COPY:%[0-9]+]]:fpr(s64) = COPY $d0 823 ; CHECK: [[FPTOUI:%[0-9]+]]:gpr(s32) = G_FPTOUI [[COPY]](s64) 824 %0(s64) = COPY $d0 825 %1(s32) = G_FPTOUI %0 826... 827 828--- 829name: test_fptoui_v4s32 830legalized: true 831registers: 832 - { id: 0, class: _ } 833 - { id: 1, class: _ } 834body: | 835 bb.0: 836 liveins: $q0 837 ; CHECK-LABEL: name: test_fptoui_v4s32 838 ; CHECK: [[COPY:%[0-9]+]]:fpr(<4 x s32>) = COPY $q0 839 ; CHECK: [[FPTOUI:%[0-9]+]]:fpr(<4 x s32>) = G_FPTOUI [[COPY]](<4 x s32>) 840 %0(<4 x s32>) = COPY $q0 841 %1(<4 x s32>) = G_FPTOUI %0 842... 843 844--- 845name: test_gphi_ptr 846legalized: true 847tracksRegLiveness: true 848registers: 849 - { id: 0, class: _, preferred-register: '' } 850 - { id: 1, class: _, preferred-register: '' } 851 - { id: 2, class: _, preferred-register: '' } 852 - { id: 3, class: _, preferred-register: '' } 853 - { id: 4, class: _, preferred-register: '' } 854 - { id: 5, class: _, preferred-register: '' } 855body: | 856 ; CHECK-LABEL: name: test_gphi_ptr 857 ; CHECK: bb.0: 858 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 859 ; CHECK: liveins: $w2, $x0, $x1 860 ; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 861 ; CHECK: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $x1 862 ; CHECK: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2 863 ; CHECK: G_BRCOND [[COPY2]](s32), %bb.1 864 ; CHECK: G_BR %bb.2 865 ; CHECK: bb.1: 866 ; CHECK: successors: %bb.2(0x80000000) 867 ; CHECK: bb.2: 868 ; CHECK: [[PHI:%[0-9]+]]:gpr(p0) = G_PHI [[COPY]](p0), %bb.0, [[COPY1]](p0), %bb.1 869 ; CHECK: $x0 = COPY [[PHI]](p0) 870 ; CHECK: RET_ReallyLR implicit $x0 871 bb.0: 872 successors: %bb.1, %bb.2 873 liveins: $w2, $x0, $x1 874 875 %0(p0) = COPY $x0 876 %1(p0) = COPY $x1 877 %4(s32) = COPY $w2 878 G_BRCOND %4, %bb.1 879 G_BR %bb.2 880 881 bb.1: 882 successors: %bb.2 883 884 885 bb.2: 886 %3(p0) = G_PHI %0(p0), %bb.0, %1(p0), %bb.1 887 $x0 = COPY %3(p0) 888 RET_ReallyLR implicit $x0 889 890... 891 892--- 893name: test_restricted_tail_call 894legalized: true 895tracksRegLiveness: true 896body: | 897 bb.0: 898 liveins: $x16, $x17 899 ; CHECK-LABEL: name: test_restricted_tail_call 900 ; CHECK: liveins: $x16, $x17 901 ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x16 902 ; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY $x17 903 ; CHECK: RET_ReallyLR 904 %0:_(s64) = COPY $x16 905 %1:_(s64) = COPY $x17 906 RET_ReallyLR 907... 908