1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect %s -o - | FileCheck %s 3 4# Check that we correctly assign register banks based off of instructions which 5# only use or only define FPRs. 6# 7# For example, G_SITOFP may take in a GPR, but only ever produces values on FPRs. 8# Some instructions can have inputs/outputs on either FPRs or GPRs. If one of 9# those instructions takes in the result of a G_SITOFP as a source, we should 10# put that source on a FPR. 11# 12# Similarly, G_FPTOSI can only take in a value on a FPR. So, if the result of 13# an instruction is consumed by a G_FPTOSI, we should put the instruction on 14# FPRs. 15 16--- 17name: load_only_uses_fp 18legalized: true 19tracksRegLiveness: true 20body: | 21 bb.0: 22 liveins: $x0 23 ; CHECK-LABEL: name: load_only_uses_fp 24 ; CHECK: liveins: $x0 25 ; CHECK-NEXT: {{ $}} 26 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 27 ; CHECK-NEXT: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+00 28 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32)) 29 ; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[C]](s32), [[LOAD]] 30 ; CHECK-NEXT: $w0 = COPY [[FCMP]](s32) 31 ; CHECK-NEXT: RET_ReallyLR implicit $w0 32 %0:_(p0) = COPY $x0 33 %1:_(s32) = G_FCONSTANT float 2.0 34 %2:_(s32) = G_LOAD %0 :: (load (s32)) 35 %3:_(s32) = G_FCMP floatpred(uno), %1, %2 36 $w0 = COPY %3(s32) 37 RET_ReallyLR implicit $w0 38... 39--- 40name: unmerge_only_uses_fp 41 42legalized: true 43tracksRegLiveness: true 44body: | 45 bb.0: 46 liveins: $x0 47 ; CHECK-LABEL: name: unmerge_only_uses_fp 48 ; CHECK: liveins: $x0 49 ; CHECK-NEXT: {{ $}} 50 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0 51 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY [[COPY]](s64) 52 ; CHECK-NEXT: [[UV:%[0-9]+]]:fpr(s32), [[UV1:%[0-9]+]]:fpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64) 53 ; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[UV]](s32), [[UV1]] 54 ; CHECK-NEXT: $w0 = COPY [[FCMP]](s32) 55 ; CHECK-NEXT: RET_ReallyLR implicit $w0 56 %0:_(s64) = COPY $x0 57 %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64) 58 %3:_(s32) = G_FCMP floatpred(uno), %1, %2 59 $w0 = COPY %3(s32) 60 RET_ReallyLR implicit $w0 61 62... 63--- 64name: store_defined_by_fp 65legalized: true 66tracksRegLiveness: true 67body: | 68 bb.0: 69 liveins: $x0, $w1 70 ; CHECK-LABEL: name: store_defined_by_fp 71 ; CHECK: liveins: $x0, $w1 72 ; CHECK-NEXT: {{ $}} 73 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 74 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1 75 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32) 76 ; CHECK-NEXT: G_STORE [[SITOFP]](s32), [[COPY]](p0) :: (store (s32)) 77 %0:_(p0) = COPY $x0 78 %1:_(s32) = COPY $w1 79 %2:_(s32) = G_SITOFP %1 80 G_STORE %2, %0 :: (store (s32)) 81 82... 83--- 84name: select_defined_by_fp_using_fp 85legalized: true 86tracksRegLiveness: true 87body: | 88 bb.0: 89 liveins: $w0, $w1, $w2 90 ; CHECK-LABEL: name: select_defined_by_fp_using_fp 91 ; CHECK: liveins: $w0, $w1, $w2 92 ; CHECK-NEXT: {{ $}} 93 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0 94 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1 95 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2 96 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32) 97 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr(s32) = COPY [[COPY2]](s32) 98 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[COPY2]](s32), [[COPY3]], [[SITOFP]] 99 ; CHECK-NEXT: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[SELECT]](s32) 100 %0:_(s32) = COPY $w0 101 %2:_(s32) = COPY $w1 102 %3:_(s32) = COPY $w2 103 %4:_(s32) = G_SITOFP %2 104 %6:_(s32) = G_SELECT %3, %3, %4 105 %8:_(s32) = G_FPTOSI %6 106 107... 108--- 109name: load_used_by_phi_fpr 110legalized: true 111tracksRegLiveness: true 112body: | 113 ; CHECK-LABEL: name: load_used_by_phi_fpr 114 ; CHECK: bb.0: 115 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 116 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1 117 ; CHECK-NEXT: {{ $}} 118 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 119 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0 120 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0 121 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 122 ; CHECK-NEXT: G_BR %bb.2 123 ; CHECK-NEXT: {{ $}} 124 ; CHECK-NEXT: bb.1: 125 ; CHECK-NEXT: successors: %bb.2(0x80000000) 126 ; CHECK-NEXT: {{ $}} 127 ; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32)) 128 ; CHECK-NEXT: G_BR %bb.2 129 ; CHECK-NEXT: {{ $}} 130 ; CHECK-NEXT: bb.2: 131 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1 132 ; CHECK-NEXT: $s0 = COPY %phi(s32) 133 ; CHECK-NEXT: RET_ReallyLR implicit $s0 134 bb.0: 135 successors: %bb.1(0x40000000), %bb.2(0x40000000) 136 liveins: $x0, $s0, $s1, $w0, $w1 137 %cond_wide:_(s32) = COPY $w0 138 %fpr_copy:_(s32) = COPY $s0 139 %ptr:_(p0) = COPY $x0 140 G_BRCOND %cond_wide, %bb.1 141 G_BR %bb.2 142 bb.1: 143 successors: %bb.2 144 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32)) 145 G_BR %bb.2 146 bb.2: 147 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1 148 $s0 = COPY %phi(s32) 149 RET_ReallyLR implicit $s0 150 151... 152--- 153name: load_used_by_phi_gpr_copy_gpr 154legalized: true 155tracksRegLiveness: true 156body: | 157 ; CHECK-LABEL: name: load_used_by_phi_gpr 158 ; CHECK: bb.0: 159 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 160 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1 161 ; CHECK-NEXT: {{ $}} 162 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 163 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1 164 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0 165 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 166 ; CHECK-NEXT: G_BR %bb.2 167 ; CHECK-NEXT: {{ $}} 168 ; CHECK-NEXT: bb.1: 169 ; CHECK-NEXT: successors: %bb.2(0x80000000) 170 ; CHECK-NEXT: {{ $}} 171 ; CHECK-NEXT: %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32)) 172 ; CHECK-NEXT: G_BR %bb.2 173 ; CHECK-NEXT: {{ $}} 174 ; CHECK-NEXT: bb.2: 175 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1 176 ; CHECK-NEXT: $w2 = COPY %phi(s32) 177 ; CHECK-NEXT: RET_ReallyLR implicit $w2 178 bb.0: 179 successors: %bb.1(0x40000000), %bb.2(0x40000000) 180 liveins: $x0, $s0, $s1, $w0, $w1 181 %cond_wide:_(s32) = COPY $w0 182 %gpr_copy:_(s32) = COPY $w1 183 %ptr:_(p0) = COPY $x0 184 G_BRCOND %cond_wide, %bb.1 185 G_BR %bb.2 186 bb.1: 187 successors: %bb.2 188 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32)) 189 G_BR %bb.2 190 bb.2: 191 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1 192 $w2 = COPY %phi(s32) 193 RET_ReallyLR implicit $w2 194 195... 196--- 197name: load_used_by_phi_gpr_copy_fpr 198legalized: true 199tracksRegLiveness: true 200body: | 201 ; CHECK-LABEL: name: load_used_by_phi_gpr 202 ; CHECK: bb.0: 203 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 204 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1 205 ; CHECK-NEXT: {{ $}} 206 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 207 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1 208 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0 209 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 210 ; CHECK-NEXT: G_BR %bb.2 211 ; CHECK-NEXT: {{ $}} 212 ; CHECK-NEXT: bb.1: 213 ; CHECK-NEXT: successors: %bb.2(0x80000000) 214 ; CHECK-NEXT: {{ $}} 215 ; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32)) 216 ; CHECK-NEXT: G_BR %bb.2 217 ; CHECK-NEXT: {{ $}} 218 ; CHECK-NEXT: bb.2: 219 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1 220 ; CHECK-NEXT: $s0 = COPY %phi(s32) 221 ; CHECK-NEXT: RET_ReallyLR implicit $s0 222 bb.0: 223 successors: %bb.1(0x40000000), %bb.2(0x40000000) 224 liveins: $x0, $s0, $s1, $w0, $w1 225 %cond_wide:_(s32) = COPY $w0 226 %gpr_copy:_(s32) = COPY $w1 227 %ptr:_(p0) = COPY $x0 228 G_BRCOND %cond_wide, %bb.1 229 G_BR %bb.2 230 bb.1: 231 successors: %bb.2 232 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32)) 233 G_BR %bb.2 234 bb.2: 235 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1 236 $s0 = COPY %phi(s32) ; G_LOAD should consider this FPR constraint and assign %load FPR 237 RET_ReallyLR implicit $s0 238 239... 240--- 241name: select_used_by_phi_fpr 242legalized: true 243tracksRegLiveness: true 244body: | 245 ; CHECK-LABEL: name: select_used_by_phi_fpr 246 ; CHECK: bb.0: 247 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 248 ; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1 249 ; CHECK-NEXT: {{ $}} 250 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 251 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0 252 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1 253 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 254 ; CHECK-NEXT: G_BR %bb.2 255 ; CHECK-NEXT: {{ $}} 256 ; CHECK-NEXT: bb.1: 257 ; CHECK-NEXT: successors: %bb.2(0x80000000) 258 ; CHECK-NEXT: {{ $}} 259 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY %gpr_copy(s32) 260 ; CHECK-NEXT: %select:fpr(s32) = G_SELECT %cond_wide(s32), %fpr_copy, [[COPY]] 261 ; CHECK-NEXT: G_BR %bb.2 262 ; CHECK-NEXT: {{ $}} 263 ; CHECK-NEXT: bb.2: 264 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1 265 ; CHECK-NEXT: $w0 = COPY %phi(s32) 266 ; CHECK-NEXT: RET_ReallyLR implicit $w0 267 ; The G_SELECT and G_PHI should end up with the same register bank. 268 ; 269 bb.0: 270 successors: %bb.1(0x40000000), %bb.2(0x40000000) 271 liveins: $s0, $s1, $w0, $w1 272 %cond_wide:_(s32) = COPY $w0 273 %fpr_copy:_(s32) = COPY $s0 274 %gpr_copy:_(s32) = COPY $w1 275 G_BRCOND %cond_wide, %bb.1 276 G_BR %bb.2 277 bb.1: 278 successors: %bb.2 279 %select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy 280 G_BR %bb.2 281 bb.2: 282 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1 283 $w0 = COPY %phi(s32) 284 RET_ReallyLR implicit $w0 285 286... 287--- 288name: select_used_by_phi_gpr 289legalized: true 290tracksRegLiveness: true 291body: | 292 ; CHECK-LABEL: name: select_used_by_phi_gpr 293 ; CHECK: bb.0: 294 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 295 ; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1 296 ; CHECK-NEXT: {{ $}} 297 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 298 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0 299 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1 300 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 301 ; CHECK-NEXT: G_BR %bb.2 302 ; CHECK-NEXT: {{ $}} 303 ; CHECK-NEXT: bb.1: 304 ; CHECK-NEXT: successors: %bb.2(0x80000000) 305 ; CHECK-NEXT: {{ $}} 306 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %fpr_copy(s32) 307 ; CHECK-NEXT: %select:gpr(s32) = G_SELECT %cond_wide(s32), [[COPY]], %gpr_copy 308 ; CHECK-NEXT: G_BR %bb.2 309 ; CHECK-NEXT: {{ $}} 310 ; CHECK-NEXT: bb.2: 311 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1 312 ; CHECK-NEXT: $s0 = COPY %phi(s32) 313 ; CHECK-NEXT: RET_ReallyLR implicit $s0 314 ; The G_SELECT and G_PHI should end up with the same register bank. 315 ; 316 bb.0: 317 successors: %bb.1(0x40000000), %bb.2(0x40000000) 318 liveins: $s0, $s1, $w0, $w1 319 %cond_wide:_(s32) = COPY $w0 320 %fpr_copy:_(s32) = COPY $s0 321 %gpr_copy:_(s32) = COPY $w1 322 G_BRCOND %cond_wide, %bb.1 323 G_BR %bb.2 324 bb.1: 325 successors: %bb.2 326 %select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy 327 G_BR %bb.2 328 bb.2: 329 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1 330 $s0 = COPY %phi(s32) 331 RET_ReallyLR implicit $s0 332 333 334... 335--- 336name: unmerge_used_by_phi_fpr 337legalized: true 338tracksRegLiveness: true 339body: | 340 ; CHECK-LABEL: name: unmerge_used_by_phi_fpr 341 ; CHECK: bb.0: 342 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 343 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1 344 ; CHECK-NEXT: {{ $}} 345 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 346 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0 347 ; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0 348 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 349 ; CHECK-NEXT: G_BR %bb.2 350 ; CHECK-NEXT: {{ $}} 351 ; CHECK-NEXT: bb.1: 352 ; CHECK-NEXT: successors: %bb.2(0x80000000) 353 ; CHECK-NEXT: {{ $}} 354 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s64) = COPY %unmerge_src(s64) 355 ; CHECK-NEXT: %unmerge_1:fpr(s32), %unmerge_2:fpr(s32) = G_UNMERGE_VALUES [[COPY]](s64) 356 ; CHECK-NEXT: G_BR %bb.2 357 ; CHECK-NEXT: {{ $}} 358 ; CHECK-NEXT: bb.2: 359 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1 360 ; CHECK-NEXT: $s0 = COPY %phi(s32) 361 ; CHECK-NEXT: RET_ReallyLR implicit $s0 362 bb.0: 363 successors: %bb.1(0x40000000), %bb.2(0x40000000) 364 liveins: $x0, $s0, $s1, $w0, $w1 365 %cond_wide:_(s32) = COPY $w0 366 367 %fpr_copy:_(s32) = COPY $s0 368 %unmerge_src:_(s64) = COPY $x0 369 G_BRCOND %cond_wide, %bb.1 370 G_BR %bb.2 371 bb.1: 372 successors: %bb.2 373 %unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64) 374 G_BR %bb.2 375 bb.2: 376 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1 377 $s0 = COPY %phi(s32) 378 RET_ReallyLR implicit $s0 379 380... 381--- 382name: unmerge_used_by_phi_gpr 383legalized: true 384tracksRegLiveness: true 385body: | 386 ; CHECK-LABEL: name: unmerge_used_by_phi_gpr 387 ; CHECK: bb.0: 388 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 389 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1 390 ; CHECK-NEXT: {{ $}} 391 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0 392 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1 393 ; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0 394 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1 395 ; CHECK-NEXT: G_BR %bb.2 396 ; CHECK-NEXT: {{ $}} 397 ; CHECK-NEXT: bb.1: 398 ; CHECK-NEXT: successors: %bb.2(0x80000000) 399 ; CHECK-NEXT: {{ $}} 400 ; CHECK-NEXT: %unmerge_1:gpr(s32), %unmerge_2:gpr(s32) = G_UNMERGE_VALUES %unmerge_src(s64) 401 ; CHECK-NEXT: G_BR %bb.2 402 ; CHECK-NEXT: {{ $}} 403 ; CHECK-NEXT: bb.2: 404 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1 405 ; CHECK-NEXT: $s0 = COPY %phi(s32) 406 ; CHECK-NEXT: RET_ReallyLR implicit $s0 407 bb.0: 408 successors: %bb.1(0x40000000), %bb.2(0x40000000) 409 liveins: $x0, $s0, $s1, $w0, $w1 410 %cond_wide:_(s32) = COPY $w0 411 %gpr_copy:_(s32) = COPY $w1 412 %unmerge_src:_(s64) = COPY $x0 413 G_BRCOND %cond_wide, %bb.1 414 G_BR %bb.2 415 bb.1: 416 successors: %bb.2 417 %unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64) 418 G_BR %bb.2 419 bb.2: 420 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1 421 $s0 = COPY %phi(s32) 422 RET_ReallyLR implicit $s0 423 424... 425--- 426name: load_used_by_sitofp 427legalized: true 428tracksRegLiveness: true 429body: | 430 bb.0: 431 liveins: $x0 432 ; The load should be assigned an fpr bank because it's used by the sitofp. 433 ; The sitofp should assign both src and dest to FPR, resulting in no copies. 434 ; CHECK-LABEL: name: load_used_by_sitofp 435 ; CHECK: liveins: $x0 436 ; CHECK-NEXT: {{ $}} 437 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 438 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32)) 439 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[LOAD]](s32) 440 ; CHECK-NEXT: $s0 = COPY [[SITOFP]](s32) 441 ; CHECK-NEXT: RET_ReallyLR implicit $s0 442 %0:_(p0) = COPY $x0 443 %1:_(s32) = G_LOAD %0 :: (load (s32)) 444 %2:_(s32) = G_SITOFP %1:_(s32) 445 $s0 = COPY %2(s32) 446 RET_ReallyLR implicit $s0 447... 448--- 449name: load_used_by_uitofp 450legalized: true 451tracksRegLiveness: true 452body: | 453 bb.0: 454 liveins: $x0 455 ; CHECK-LABEL: name: load_used_by_uitofp 456 ; CHECK: liveins: $x0 457 ; CHECK-NEXT: {{ $}} 458 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0 459 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32)) 460 ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[LOAD]](s32) 461 ; CHECK-NEXT: $s0 = COPY [[UITOFP]](s32) 462 ; CHECK-NEXT: RET_ReallyLR implicit $s0 463 %0:_(p0) = COPY $x0 464 %1:_(s32) = G_LOAD %0 :: (load (s32)) 465 %2:_(s32) = G_UITOFP %1:_(s32) 466 $s0 = COPY %2(s32) 467 RET_ReallyLR implicit $s0 468... 469