xref: /llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-align.mir (revision 99e8e17313e76c50a0d6606394fed98832fd8fec) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
3#
4# Verify register banks for G_ASSERT_ALIGN.
5#
6
7---
8name:            gpr
9alignment:       4
10legalized:       true
11tracksRegLiveness: true
12body:             |
13  bb.0:
14    liveins: $x0
15
16    ; G_ASSERT_ALIGN should end up on a GPR.
17
18    ; CHECK-LABEL: name: gpr
19    ; CHECK: liveins: $x0
20    ; CHECK-NEXT: {{  $}}
21    ; CHECK-NEXT: %copy:gpr(p0) = COPY $x0
22    ; CHECK-NEXT: %copy_assert_align:gpr(p0) = G_ASSERT_ALIGN %copy, 4
23    ; CHECK-NEXT: $x1 = COPY %copy_assert_align(p0)
24    ; CHECK-NEXT: RET_ReallyLR implicit $x1
25    %copy:_(p0) = COPY $x0
26    %copy_assert_align:_(p0) = G_ASSERT_ALIGN %copy(p0), 4
27    $x1 = COPY %copy_assert_align
28    RET_ReallyLR implicit $x1
29
30...
31